- Cisco (San Jose, CA)
- …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
- Sandia National Laboratories (Albuquerque, NM)
- …to the nuclear weapons community. The department maintains expertise on the full NW ASIC product realization process beginning with customer ... compliance with NNSA security requirements prior to the interview date. Job ID: 694469 Job Family: RD Regular/Temporary Position: R Full /Part- Time Status: F more
- Sandia National Laboratories (Albuquerque, NM)
- …to the nuclear weapons community. The department maintains expertise on the full NW ASIC product realization process beginning with customer ... responsive weapon development and future advanced system functionality. The ASIC design Agency (DA) PRT is responsible for ...prior to the interview date. Job ID: 694440 Job Family: RD Regular/Temporary Position: R Full /Part- Time Status:… more
- Meta (Sunnyvale, CA)
- … ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer Intern, Infra Silicon Enablement Responsibilities: 1. Work across ... **Summary:** Meta is seeking an ASIC Engineering Intern to join our Release to...silicon diagnostics, performance analysis, debug tools, bare metal and full stack systems, from early labs to data center… more
- Northrop Grumman (Baltimore, MD)
- …you to join our team as a Principal Digital Engineer /Senior Principal Digital Engineer (FPGA and ASIC Design) based out of Linthicum, MD. **What You'll get ... Systems that encompasses Digital Engineering to support FPGA and ASIC product development. + Work closely with design engineers...Familiarity with Xilinx and Intel FPGA technology As a full - time employee of Northrop Grumman Mission Systems,… more
- Capgemini (San Francisco, CA)
- …role may be eligible for other compensation including variable compensation, bonus, or commission. Full time regular employees are eligible for paid time ... **Physical Design Engineer ** **Job Description:** **The ASIC Physical...multiple voltage rails, UPF knowledge. *Experience in Block-level and Full -chip integration. *Knowledge of signoff closure - Timing with… more
- Google (Mountain View, CA)
- ASIC Lead Engineer , Project Taara (Fixed Term)...and Git. The US base salary range for this full - time position is $168,000 - $210,000 + bonuses ... unlicensed alternatives face About the Role: The Taara Project is seeking an ASIC lead engineer to drive the next generation of custom chip designs as part of… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... voltage rails, UPF knowledge. + Experience in Block-level and Full -chip integration. + Knowledge of signoff closure - Timing...the spot for quick solutions and work-around at the time of tape-out to hit the schedule on … more
- Amazon (Cupertino, CA)
- …to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies...of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For… more
- IBM (San Jose, CA)
- …by applicable law. The compensation range and benefits for this position are based on a full - time schedule for a full calendar year. The salary will vary ... next for IBM and the world. As a Hardware Engineer intern, you will work with world-class global researchers...engineers. Required Technical and Professional Expertise + Experience in ASIC or FPGA logic verification. + Strong FPGA/ ASIC… more
- Micron Technology, Inc. (Minneapolis, MN)
- …and collaborative skills in this exciting and outstanding opportunity. As a Digital Design Engineer in Micron's ASIC logic design team, you will be engaged in ... candidate will be a driven individual looking to advance into the high-speed ASIC and memory controller design industry. **What's Encouraged Daily** + Be part of… more
- Amazon (Austin, TX)
- …underserved communities around the world. Come work at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using ... and cost constraints. . Drive high quality designs for first- time right silicon solutions, and meeting the power objectives...of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For… more
- Google (Sunnyvale, CA)
- …have the best and fastest experience possible. The US base salary range for this full - time position is $127,000-$187,000 + bonus + equity + benefits. Our salary ... using SystemVerilog for Application-Specific Integrated Circuits (ASICs). + Familiarity with ASIC standard interfaces and memory system architecture. In this role,… more
- Amazon (Cupertino, CA)
- …to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies...of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For… more
- Lockheed Martin (Liverpool, NY)
- …incidental absences and other reasons; receive at least 90 hours for holidays\. Represented full time employees accrue 6\.67 hours of Vacation per month; accrue ... Leave, Paid time off, and Holidays\. \(Washington state applicants only\) Non\-represented full \- time employees: accrue at least 10 hours per month of Paid … more
- Google (Sunnyvale, CA)
- …have the best and fastest experience possible. The US base salary range for this full - time position is $127,000-$187,000 + bonus + equity + benefits. Our salary ... Engineering. + Experience with Universal Verification Methodology (UVM). + Experienced with the full verification life cycle. Be part of a diverse team that pushes… more
- Cisco (Maynard, MA)
- …to a company culture that empowers an inclusive future for all. What You'll Do The ASIC Design Verification Co-Op Engineer will be a member of a team working on ... within the engineering community to add value to the ASIC projects. This engineer must be a...and written) Minimum Qualifications * Currently enrolled in a full - time undergraduate or graduate program * Knowledge… more
- Amazon (Austin, TX)
- Description Amazon Web Services (AWS) internships are full - time (40 hours/week) for 12 consecutive weeks during summer. By applying to this position, your ... in the right direction, ensuring our hardware is functional and healthy, and managing the full lifecycle of our systems at the huge scale and complexity of AWS. If… more
- Amazon (Austin, TX)
- Description Amazon Web Services (AWS) internships are full - time (40 hours/week) for 12 consecutive weeks during summer. By applying to this position, your ... be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit… more
- Google (Mountain View, CA)
- …make people's lives better through technology. The US base salary range for this full - time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ... ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and… more