• Senior C++ Software Engineer - Chip

    NVIDIA (Santa Clara, CA)
    …build and verification of architectural, rtl, and gate level designs. Our tools enable our chip design teams to work on state-of-art design technologies such ... software engineer, you will craft highly efficient software to automate and facilitate chip design and verification engineering workflows and processes, and look… more
    NVIDIA (09/04/24)
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  • Senior C++ Software Engineer - Chip

    NVIDIA (Santa Clara, CA)
    …a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: + Work as ... team is responsible for development and support of infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level… more
    NVIDIA (07/14/24)
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  • Test Chip Design Automation Intern…

    Global Foundries (Malta, NY)
    …opportunities, and the chance to network with executives. Summary of Role : The Test Chip Design Automation intern will be working in a dynamic team of ... leading full-service semiconductor foundry providing a unique combination of design , development, and fabrication services to some of the...design and layout engineers. The team's mission is to… more
    Global Foundries (09/19/24)
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  • Chip Package Signal and Power Integrity…

    Google (Sunnyvale, CA)
    … and other SI/PI Engineers. You will work with various cross-functional teams, including Chip Design , System Design , software team and vendors. You will ... IO interfaces (serdes, memory, D2D) considering IO PHY, SI/PI and physical design . + Collaborate with chip design team, system design teams and suppliers… more
    Google (09/07/24)
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  • Chip Power Architecture Lead

    NVIDIA (Santa Clara, CA)
    …crowd: + Experience with a breadth of System Architectures in different areas of chip design and power management microarchitecture. + Inventions in one or more ... We are now looking for a Chip Power Architecture Lead! NVIDIA is seeking an exceptional Chip Power Architecture Lead to help us build power efficient and… more
    NVIDIA (08/28/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Electrical Engineering or equivalent experience + 5 plus years of proven experience in chip design , specializing in SOC integration and design automation. + ... + Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On- Chip design /integration flow, and design automation. + Strong coding… more
    NVIDIA (08/09/24)
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  • SOC Design Engineer - New College Grad

    NVIDIA (Santa Clara, CA)
    …+ Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On- Chip design /integration flow, and design automation. + Strong coding ... We are looking for SOC Design Engineer! The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a … more
    NVIDIA (09/19/24)
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  • Physical Design Engineer, Static Timing…

    Google (Sunnyvale, CA)
    … flow/methodology, to successful tape-outs and shipping silicon. + Experience in full chip design planning and working with multiple foundries. + Experience in ... of experience in static timing (ie, to create full chip timing constraints, perform full chip static...ECO creation). + Experience in working across various physical design areas (ie, EDA scripting, block level synthesis, floorplanning,… more
    Google (09/20/24)
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  • Analog/Mixed-signal design - Sumer Intern

    Skyworks (Nashua, NH)
    …related) Minimum Requirements + Strong motivation to contribute to all facets of chip design from conceptualization to release to mass production + Experience ... Analog/Mixed-signal design - Sumer Intern Apply now " Date:Sep...blocks, do and/or supervise physical layout, verify circuit and chip -level operation and performance, and assist with tape-out related… more
    Skyworks (09/09/24)
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  • Staff RF/Analog Mixed-Signal IC Design

    Northrop Grumman (Linthicum, MD)
    …lead an IC design project from concept through tapeout. Create and maintain chip design schedule and meet tight deadlines in accordance with the overall ... and maintain a TS/SCI with polygraph security clearance. Preferred Qualifications: + Design chip lead with a proven record of successful tapeouts; ability to … more
    Northrop Grumman (08/11/24)
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  • Semi-Custom Design Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …+ BS/MS in Computer or Electrical Engineering or equivalent experience + Proven ability in chip design , with 5+ years of specializing in SOC integration and ... + Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On- Chip design /integration flow, and design automation + Strong coding… more
    NVIDIA (07/23/24)
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  • Senior CPU Tooling and Design Automation…

    NVIDIA (Santa Clara, CA)
    …of NoC/SoC tooling in order to enable productivity improvements + Understand the chip design flow and distill this knowledge into feature requirements for ... and autonomous vehicles? Come join the CPU tooling and design automation team and help us push boundaries for...for the CPU/Fabric teams to improve efficiency + Develop Network-on- Chip (NoC)/SoC tooling, working closely with architects, chip more
    NVIDIA (07/16/24)
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  • Senior Physical Design Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …years experience in Physical Design Engineering + Familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and ... today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs....+ Participate in developing flow and tool methodologies for chip floorplan, power and clock distribution, chip more
    NVIDIA (08/08/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …and analyzing innovative microarchitectural structures and subsystems. Join the future of chip design , you will work on groundbreaking products with a ... gaming, and consumer use cases. + Collaborate with Architects, Chip Leads, and Customers on SOC IP design... Chip Leads, and Customers on SOC IP design , development, timing closure, power analysis, methodology alignment, and… more
    NVIDIA (07/23/24)
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  • Sr. Physical Design Engineer - Full…

    Amazon (Sunnyvale, CA)
    …is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We are a part ... & Responsibilities: - Collaborate with architecture, timing, and logic design teams making a crucial impact on delivering cutting...shell and drive to automate flows - Proficiency in chip front-end and back-end implementation tools such as Fusion… more
    Amazon (08/30/24)
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  • Senior/Principal DRAM Design Engineer

    Micron Technology, Inc. (Boise, ID)
    …you will contribute to the pathfinding of future DRAM nodes and the development chip design required to bring innovative new insights to production on ... enrich life. As a Senior or Principal Lead DRAM Design Engineer in the Node Development Design ...Develop strategies to prove innovative new insights through test chip definition and silicon validation. + Look for opportunities… more
    Micron Technology, Inc. (09/17/24)
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  • ASIC Design for Test - Technical Lead

    Cisco (San Diego, CA)
    …IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL. * ... -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the … more
    Cisco (09/13/24)
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  • ASIC Design for Test Technical Leader

    Cisco (San Jose, CA)
    …IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL. * ... -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the … more
    Cisco (08/16/24)
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  • Mixed Signal Design Engineer

    Skyworks (Austin, TX)
    design experience. + Strong motivation to contribute to all facets of chip design from conceptualization to release to mass production. + Experience with ... will participate in mixed signal system architecture, algorithm development, design verification, and full- chip mixed-signal verification. Responsibilities… more
    Skyworks (08/08/24)
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  • Layout Design Engineer

    Micron Technology, Inc. (Atlanta, GA)
    …physical layout of circuits; 3. Device physics, including basic building blocks of chip design ; 4. Utilizing material characteristics to affect the performance ... schematic. Work on floor planning, routing, and power bus design . Work and support the efforts of groups such...of chip design when laid out; 5. Digital...of chip design when laid out; 5. Digital logic gates construction… more
    Micron Technology, Inc. (08/28/24)
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