• Raytheon (Tucson, AZ)
    …a security clearance.Qualifications We Prefer:Working knowledge of Analog, Digital including DDR , specific experience with RF, Power, and mixed technology, including ... multi-layer designs with High Density Interconnect (HDI) technologyTechnical PCB design skills using the Siemens design toolset including, but not limited to the Xpedition Layout tool suite with working knowledge of schematic capture, placement, routing, use… more
    JobGet (03/12/25)
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  • HBM/ DDR /SerDes DFT Verification Lead…

    Broadcom (San Jose, CA)
    …**Job Description:** Broadcom's ASIC Product Division is seeking candidates for HBM/ DDR /SERDES Verification Lead Engineer position at our San Jose, California ... in ensuring the robustness and reliability of our HBM, DDR and SerDes designs through comprehensive Design for Test...+ Implement and verify DFT methodologies specifically for HBM, DDR and SerDes designs. + Collaborate with design and… more
    Broadcom (02/19/25)
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  • Mixed Signal SVE Engineer

    Qualcomm (San Diego, CA)
    …issues. **Key Responsibilities:** + Support the bring-up, debugging, and optimization of DDR PHY for all post-silicon teams. + Anticipate and address potential ... product launches. + Provide post-customer release support for any DDR PHY-related blocking issues. + Contribute to and debug... PHY-related blocking issues. + Contribute to and debug DDR training processes. + Generate detailed and clear test… more
    Qualcomm (03/04/25)
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  • Principal Engineer - Signal and Power Integrity…

    Qualcomm (Folsom, CA)
    …model extraction and system-level simulation, such as PCIe, USB, UFS, and DDR . **Minimum Qualifications:** * Bachelor's degree in Science, Engineering, or related ... + 10+ years of experience with 5+ years in DDR /SerDes in Package/PCB/System Design related to compute/server standards. +...as PCIe, USB, UFS, and MIPI. + Experience in DDR design specifications such as DDR and… more
    Qualcomm (02/21/25)
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  • Memory System Architect - Cloud SoC Architecture

    Qualcomm (Santa Clara, CA)
    …seeking a Memory System Architect with experience and expertise in SRAM, DRAM, DDR , LPDDR, HBM, GDDR and newly emerging memory technologies to drive the analysis, ... products. **Skills/Experience:** + Outstanding memory architecture expertise on SRAM, DRAM, DDR , LPDDR, HBM, GDDR and emerging memory technologies such as STT-MRAM,… more
    Qualcomm (01/21/25)
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  • ASICS Design Verification Engineer (Santa Clara,…

    Qualcomm (Santa Clara, CA)
    …in verifying complex SOC or SOC subsystems + Experience with caches and DDR memory protocol verification + Experience with using memory verification VIP's + Exposure ... to DDR phy + Exposure to firmware/driver development using c++...proficiency** : UVM, system verilog, assertion, C++, python **Technology:** DDR , CACHE, SOC **Minimum Qualifications:** * Bachelor's degree in… more
    Qualcomm (03/07/25)
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  • Memory Control Design Engineer

    Qualcomm (San Diego, CA)
    …Design Team is looking for ASIC Design Engineers for the next generation high speed DDR Controllers. The front end of the DDR controller interfaces to the rest ... to drive productivity and quality of results. **Experience with the following:** + DDR controller architectures especially the front end interfacing to the CPU, DSP,… more
    Qualcomm (03/05/25)
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  • Senior Signal and Power Integrity Engineer

    NVIDIA (Santa Clara, CA)
    …review, and post-layout analysis. + System-level signal integrity simulation of PCIE, LPDDR/ DDR /GDDR, MIPI, HDMI, USB and other interfaces. + Analyze and optimize ... implementation of one or more high speed electrical interfaces, such as PCIE, LPDDR/ DDR /GDDR, MIPI, HDMI, USB etc. + Hands on experience with HFSS, Sigrity, Hspice… more
    NVIDIA (03/11/25)
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  • Server DRAM Engineer

    Qualcomm (Santa Clara, CA)
    …signal integrity, power integrity, and high-speed analog/digital designs. + Experience with DDR technologies and protocols, eg, DDR5 and I2C. + Experience with ... in the design, bring-up, qualification, and production of servers utilizing modern DDR memory, including advanced memories such as MRDIMM and MCRDIMM. + Familiarity… more
    Qualcomm (03/07/25)
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  • Technologist, System Design Engineering

    SanDisk (Milpitas, CA)
    …**SoC architecture** . + Proven expertise in hardware design, including **NVMe, DDR , power supplies, and system-level integration** , is required. + Strong debugging ... area. + Hands-on experience in **hardware design** involving components such as **NVMe, DDR , power supplies** , and other SSD-specific hardware. + **Soft Skills** :… more
    SanDisk (03/07/25)
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  • Electrical Engineer - Early Career

    Lockheed Martin (Orlando, FL)
    …skills, complex circuit card design experience including high speed interfaces \(PCIe, DDR , etc\.\), as well as familiarity with Systems On a Chip \(SOC\) ... \- Experience with complex circuit card design including high speed interfaces \(PCIe, DDR , etc\.\)\. \- Familiarity with SOC / MCP solutions and ASIC verification… more
    Lockheed Martin (03/04/25)
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  • Research Assistant Professor: Cancer…

    University of Pennsylvania (Philadelphia, PA)
    …especially in the areas of cancer therapy targeted to DNA damage repair ( DDR ) and immunotherapy. In addition to this expertise and experience, a background and ... and translational research to support early human trials with a focus on DDR and immune targets independently or in combination. Over time, the research program… more
    University of Pennsylvania (02/21/25)
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  • Next-Gen, High-Speed Memory Subsystem ASIC Digital…

    Qualcomm (San Diego, CA)
    …Team is looking for ASIC Design Engineers for the next generation high speed LPDDR/ DDR memory subsystems.. The front end of the DDR controller interfaces to ... the rest of the system such as CPU, GPU, DSP, Multimedia Processors and the engineer is expected to be responsible for enabling high speed (1Ghz+) designs in QCT products. The candidate will work on architecture, design (RTL coding), and deployment of the next… more
    Qualcomm (02/19/25)
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  • RF/Analog Design/Mixed-Signal Engineering…

    Qualcomm (Boxborough, MA)
    …Mixed signal IP and high speed interface (ADC/DAC, PLL, Sensor, Serdes, DDR , etc.) architecture definition, design, implementation (using standard ASIC flow), and ... equivalency checks, and ECO implementation + SERDES (PCIe, USB), Memory ( DDR , HBM) or 2D/3D Die-to die(D2D) Interfaces system exploration and system/technology… more
    Qualcomm (02/18/25)
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  • HBM PHY Expert, Annapurna Labs

    Amazon (Austin, TX)
    …experience in Silicon development with -3+ years in SOC/IO/Subsystems -Good understanding of DDR /HBM at the PHY and controller level -Good knowledge of DDR /HBM ... training, timing parameters and/or controller features -Drive the IP Integration and design of silicon and 2.5D packaging -Support the physical design team, review clocking and timing constraints -Drive cross-functional triage effort on complex functional and… more
    Amazon (02/12/25)
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  • Compute Hardware Applications Engineer - Senior

    Qualcomm (San Diego, CA)
    …High Speed SerDes), Embedded Processors (CPUs, GPUs, NPUs, DSPs) Memory & Peripherals ( DDR , UFS, USB, PCIe, CSI, DSI, DP, Ethernet, etc.) and related Business topics ... parts placement, and PCB routing reviews on customer platforms, including DDR , Power Delivery Network, and Signal Integrity simulations. + Create/Contribute to… more
    Qualcomm (02/10/25)
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  • Sr. Hardware System Design Engineer

    Broadcom (San Jose, CA)
    …the design and implementation of high-power, low-noise analog power systems, DDR interfaces, and other critical components. + Collaborate closely with ... debugging of complex embedded systems. + Familiarity with interfaces such as PCIe, DDR , USB, SPI, and I2C, and their integration into system-level designs. +… more
    Broadcom (02/01/25)
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  • Principal Product Engineer

    Cadence Design Systems, Inc. (Cary, NC)
    …will be the main technical interface on Key Customer engagements deploying our advanced DDR PHY IP and SERDES IP. This is a hands-on technical position and candidate ... system integration questions. + Engage with IP customers to review Serdes/ DDR IP integration guidelines, provide integration training and recommendations to customer… more
    Cadence Design Systems, Inc. (02/01/25)
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  • Staff AI Software Engineer

    Qualcomm (Santa Clara, CA)
    …debugging to ensure high performance and efficiency. + Conduct CPU profiling and manage DDR to optimize system performance. + Implement and deploy ML models and AI ... deployment. + Proficiency in CNNs, quantization, and model debugging. + Experience with DDR and CPU profiling. + Strong understanding of ML models and AI… more
    Qualcomm (02/01/25)
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  • Staff system/software performance engineer

    Qualcomm (San Diego, CA)
    …and bus. + Knowledge on SoC (System on Chip) IP cores like CPU, GPU, DDR , DSP and assess the performance with benchmarks. + Understanding of Linux kernel and device ... meet customer needs. + Profile/analysis the popular benchmarks KPI of CPU/GPU/ DDR /IO,etc. + Characterize/Analysis the hypervisor performance. + Profile system memory… more
    Qualcomm (01/30/25)
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