• Director , HBM SoC Design - TPG

    Micron Technology, Inc. (Dallas, TX)
    …groundbreaking technologies that are transforming how the world uses information to enrich life. As the Director of HBM SoC Design, you will lead a team of HBM ... with IP providers and seamlessly integrating complex IP from third parties into the SoC ,...for various memory types (DDR, LPDDR, HBM). + Strong RTL development capabilities and familiarity with IP more
    Micron Technology, Inc. (09/28/24)
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  • SoC Architect - Director Level

    Capgemini (San Francisco, CA)
    …Develop architecture and micro-architecture from specs (Full chip design for multimillion gates SoC ) . Manage IP dependencies, planning and tracking of all ... timing closure, top level test plans, and verification. . 15 years' experience with SoC design (Digital design and development RTL ) . Experience with chiplet… more
    Capgemini (09/17/24)
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  • Director Physical Design

    Microsoft Corporation (Austin, TX)
    …(PD) and implementation engineers. + Overseeing a diverse set of projects, including soft IP ( intellectual property ), test chips, and mixed-signal IP ... IP Silicon team and lead a team of RTL to GDS, RTL to PD, and...a digital system, acting as a key interface between IP and System on Chip ( SoC ). +… more
    Microsoft Corporation (11/06/24)
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  • ASIC Digital Design Engineer - WiFi MAC

    Qualcomm (San Jose, CA)
    …Engineer, you will define, model, design, optimize, verify, validate, implement, and document IP (block/ SoC ) development for a variety of high performance, high ... and experience to define, model, design, optimize, verify, validate, implement, and document IP (block/ SoC ) development for a variety of high performance, high… more
    Qualcomm (09/23/24)
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  • Principal Digital Verification Engineer/Senior…

    Northrop Grumman (Linthicum, MD)
    …to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we ... techniques. + Perform functional verification of register transfer level ( RTL ) code of a complex ASIC at block level...code of a complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl.… more
    Northrop Grumman (11/02/24)
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  • Digital Design Engineer

    Qualcomm (Santa Clara, CA)
    …model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/ SoC ) development for a variety of high performance, high ... quality check such as lint, CDC and low power rule checks . RTL -level and gate-level vector-based power analysis **Minimum Qualifications:** * Bachelor's degree in… more
    Qualcomm (09/25/24)
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  • Staff Verification Engineer-Active TS/SCI…

    Northrop Grumman (Linthicum, MD)
    …to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we ... individual will perform functional verification of register transfer level ( RTL ) code of a complex ASIC at block level...code of a complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilog.… more
    Northrop Grumman (11/07/24)
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