• Principal IO Design Engineer, HBM Design

    Micron Technology, Inc. (Folsom, CA)
    …computer memory interface crafted for 3D-stacked synchronous dynamic random-access memory (SDRAM). HBM stacks multiple DRAM chips vertically, resulting in a ... responsible for crafting and analyzing high-speed IO circuits for DRAM & Interface die. This includes simulating, optimizing, and...design, custom high-speed PHY design, analog circuit design, and DFT circuits to deliver advanced HBM products… more
    Micron Technology, Inc. (10/23/24)
    - Save Job - Related Jobs - Block Source
  • Senior Memory System Resiliency Architect

    NVIDIA (Santa Clara, CA)
    …As a member of the Memory system team, you will collaborate with DRAM vendors, Product engineering, System resiliency, DFT and Quality teams to define ... improvements for future generations of NVIDIA products, and future DRAM generations. What we need to see: + BS... resilience, stress testing and screening + Knowledge of HBM , GDDR, LPDDR, or DDR or related protocols. Experience… more
    NVIDIA (11/16/24)
    - Save Job - Related Jobs - Block Source
  • Senior ASIC Design Engineer - Memory Controller

    NVIDIA (Santa Clara, CA)
    …define the computing platforms of tomorrow. What you'll be doing: + As a member of our Memory Subsystem Design team, you will collaborate with architects, software ... 5+ years of meaningful industry experience and a background in high speed DRAM and/or processor design (ie Graphics, Microprocessors, Network Processors, or Mobile /… more
    NVIDIA (11/13/24)
    - Save Job - Related Jobs - Block Source