• Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone ... Engineering (or equivalent experience) + At least 5+ years of hands-on layout design experience + Deep understanding of analog circuit layout concepts… more
    NVIDIA (11/19/24)
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  • Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... BSEE or equivalent experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is… more
    NVIDIA (10/14/24)
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  • Integrated Circuit (IC) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... and laying out devices, test structures, systems, and full mask reticles based on input from device and process...in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our… more
    MIT Lincoln Laboratory (09/12/24)
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  • Senior Mask Design Engineer…

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing ... You will have a BSEE (or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed knowledge of EDA tools from Cadence,… more
    NVIDIA (10/17/24)
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  • Senior Mask Designer and CAD…

    NVIDIA (Austin, TX)
    …creativity and intelligence. We would love to hear from you! We are seeking a Senior Mask Layout Design Engineer to join our growing and dynamic team. The ... + BSEE degree (or equivalent experience) + 7+ years of industry experience in Mask and Layout Design . + Deep understanding of layout concepts in… more
    NVIDIA (09/27/24)
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  • Senior Mask Design Engineer…

    NVIDIA (Santa Clara, CA)
    …the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from ... you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible… more
    NVIDIA (09/04/24)
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  • Electronic-Photonic Process Design Kit…

    MIT Lincoln Laboratory (Lexington, MA)
    …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... changes. The engineer will collaborate with others involved in mask layout from basic layout ...o Programming in Perl, TCL, or Python o RF layout design experience o Experience with Cadence… more
    MIT Lincoln Laboratory (09/14/24)
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  • Hardware Design Engineer

    Actalent (Morrisville, NC)
    Description: NOTE: START DATE IS JANUARY 2 2025 Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion ... for IC Layout design of high-speed CMOS Interface D2D...for IC Layout design of high-speed CMOS Interface D2D and SERDES for...TX OTAs LDO Clock Distribution Bandgap and Bias - Layout Design review presentations. - Layout more
    Actalent (11/22/24)
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  • Hardware Design Engineer

    Actalent (Morrisville, NC)
    Job Title: Hardware Design Engineer Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for IC ... Layout design of high-speed CMOS Interface D2D...Layout design of high-speed CMOS Interface D2D and SERDES for...TX, references, etc. is desired. + Knowledge of analog design and layout guidelines and high-speed IO.… more
    Actalent (11/20/24)
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  • Scientist II (Semiconductors)

    Leonardo DRS, Inc. (Dallas, TX)
    …fabrication, and integration have on final device performance. + Must understand device design parameters and associated mask layout requirements. + Must ... candidate with experience in photolithography including fab processing and mask layout as well as hands on...and experience with photolithography (coat, expose, develop) and photomask design and layout . + Ability to understand… more
    Leonardo DRS, Inc. (11/23/24)
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  • Design Engineer III

    PCB Piezotronics, Inc. (Depew, NY)
    …* Utilize layout software, preferably L-Edit, for wafer mask layout . * Conduct comprehensive data analysis, design experiments, and develop meaningful ... or Physics Experience: + 5+ years in MEMS accelerometer or pressure sensor design + MEMS mask Layout + Finite Element Analysis Travel Requirements: As Needed… more
    PCB Piezotronics, Inc. (10/30/24)
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  • Hardware Design Engineer

    Actalent (Charlotte, NC)
    Description: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for IC Layout design . ... PLL DLL ADC RX TX OTAs LDO Clock Distribution Bandgap and Bias - Layout Design review presentations. - Layout floor-planning and supervision. - Physical LVS… more
    Actalent (11/22/24)
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  • Sr. Semiconductor Advanced Packaging…

    L3Harris (Palm Bay, FL)
    …SCM + Experience with silicon photonics + Autocad, L-Edit, Klayout, or equivalent 2D mask layout tool L3Harris Technologies is proud to be an Affirmative ... Job Title: Sr. Semiconductor Advanced Packaging Designer (Cadence Allegro) Job Code: 16822 Job Location:...designer 24.1) and Cadence SCM. Understand and apply design verification software (PVS, LVS), incorporate design more
    L3Harris (10/14/24)
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  • Principal Circuit Design Engineer

    Microsoft Corporation (Boise, ID)
    …DTCO knobs + Serve as technical lead to a team of circuit and mask layout engineers + Devise methodologies for statistical analysis and timing/power/EMIR ... cloud hardware. We are looking for a **Principal Circuit Design Engineer** to design and build customer-focused solutions, discover insights and utilize industry… more
    Microsoft Corporation (11/26/24)
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  • Engineer, DRAM Design Rule

    Micron Technology, Inc. (Boise, ID)
    …to the database layout , and prioritize development of solutions with Process Integration, Advanced Mask Design , Scribe & Frame, Layout & Design + ... for DRAM array + Assist with reticle making from concept to fab including design , layout , scribe and test structure, reticle manufacturing specs and pre-tapeout… more
    Micron Technology, Inc. (10/11/24)
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  • SMTS, Design Rule Enablement Team TPG

    Micron Technology, Inc. (Boise, ID)
    …the database layout , and prioritize development of solutions with Process Integration, Advanced Mask Design , Scribe & Frame, Layout & Design ... Maintain and implement meaningful communication between Process Integration, Product Engineering, Design , and Advanced Mask teams Improve timely documentation of… more
    Micron Technology, Inc. (10/12/24)
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  • ESAD Electrical Engineer Designer

    Lockheed Martin (Grand Prairie, TX)
    …Electrical Tech Lead, your responsibilities will include but are not limited to: \- Layout and mask design , device evaluation and characterization, test box ... 114,000 people worldwide and is principally engaged in the research, design , development, manufacture, integration and sustainment of advanced technology systems,… more
    Lockheed Martin (11/21/24)
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  • ROIC Design Engineer

    Lockheed Martin (Goleta, CA)
    …digital to analog converters, and high speed serial transmitters * Transistor level layout mask design * Serial interface designs including serial ... presentations * Requirements and concept development of ROIC systems, circuit block design , circuit simulation, coordination of circuit layout designers * Lab… more
    Lockheed Martin (10/02/24)
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  • 3D Heterogeneous Integration Development Engineer…

    Micross Components (Durham, NC)
    …deposition, electroplating, and die assembly processes. The position may also require performing mask design & layout , electrical testing, and other forms ... of material & process characterization. The successful candidate will have a strong background in back-end-of-the-line (BEOL) semiconductor processing (eg MEMS or other post-CMOS processing). Experience in advanced packaging and/or 3D integration processes is… more
    Micross Components (11/13/24)
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  • Senior Mask Preparation Engineer

    onsemi (Richardson, TX)
    …with photomask shop venders on delivery. + Interface with other engineering teams including Design , Fab, Tech Development as well as mask vendors to facilitate ... foundries. + Perform DRC & LVS verification on chip design layouts when needed. + Perform floor-planning for production...development test patterns. + Write automation scripts for basic layout and/or data prep functions. + Support Integration team… more
    onsemi (09/28/24)
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