- NVIDIA (Santa Clara, CA)
- …can make a lasting impact on the world. We are looking for a motivated CAD Methodology Engineer to join our dynamic and growing team. If you like solving ... part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the RTL CDC and RDC...! We're responsible for the RTL CDC and RDC methodology for all of NVIDIA's semiconductor products. What you'll… more
- Amazon (Cupertino, CA)
- …integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, ... Accelerator chips in advanced nodes Drive improvement in RTL2GDS flows/ methodology for PPA and TAT improvements Create Dashboard and...- 5+ years of experience in developing physical design methodology or CAD flows in synthesis, PNR, and sign-off… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... and Timing. + Good knowledge of extraction, device physics, STA methodology and EDA tools limitations. Good understanding of mathematics/physics fundamentals of… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... stand out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl, Python, Tcl, Make scripting NVIDIA is widely… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Improvement Technology Scaling to join ... our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in crafting our groundbreaking and innovating chips, enjoy working… more
- Qualcomm (Austin, TX)
- …Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer , you will work with implementation and CAD teams to ... implement the designs meeting aggressive power, area and performance goals using industry standard tools/flows for next generation CPUs. **Requirements:** + BA/BS degree in Electrical Engineering with 5+ years of practical experience + Experience with… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... leading GPUs and SoCs. This position is a broad opportunity to optimize performance, yield, and reliability through increasingly comprehensive modeling, informative analysis, and automation. This work will influence the entire next generation computing… more
- NVIDIA (Santa Clara, CA)
- …to join us today. The NVIDIA Clocks group is looking for a top ASIC Methodology engineer with proven experience in high-speed logic design and verification. In ... order to support high frequency clock domains, the complexity of clocking structure has increased significantly. Modern clocking design needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are seeking an innovative Custom Circuits Timing Methodology Engineer to help drive sign-off strategies for the world's ... leading GPUs and SoCs. This position is a broad opportunity to optimize performance, yield, and reliability through increasingly comprehensive modeling, informative analysis, and automation. This work will influence the entire next generation computing… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software ... solutions to debug world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company with product lines ranging from consumer graphics to self-driving cars and the growing field of… more
- Skyworks (Irvine, CA)
- SMTS, PE Methodology / EDA Engineer Apply now " Date:Nov 28, 2024 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and exciting ... the way the world communicates. Requisition ID: 74255 Job Description SMTS, PE Methodology /EDA Engineer Mobile Solutions Business IP development team is looking… more
- NVIDIA (Santa Clara, CA)
- …imagination and intelligence. Make the choice to join us today. DFX Methodology Group at NVIDIA works on groundbreaking innovations involving crafting creative ... world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you! #LI-Hybrid… more
- NVIDIA (Santa Clara, CA)
- NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is uniquely positioned to have an end-to-end view of ... As a member of this team, you will evaluate next gen silicon and define methodology , design, SW/FW, tool requirements needed for HW validation. The work you do will… more
- quadric.io, Inc (Burlingame, CA)
- …Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design methodologies and ... automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric processor IP implementation scripts from RTL to GDS across multiple advanced process nodes. + Preform test chip tape outs as necessitated by… more
- NVIDIA (Santa Clara, CA)
- …closure + Work with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all our product lines ... What we need to see: + MS in Electrical or Computer Engineering (or equivalent experience) + Minimum 7 years' experience in Physical Design Engineering + Proven track record of PPA improvement on high performance and low power designs in advanced technology… more
- NVIDIA (Santa Clara, CA)
- Do you have a passion for computer gaming, virtual reality, computer vision, and artificial intelligence? Ever dream about inventing your own holodeck? Do you want to ... work on leading-edge problems alongside some of the most forward-thinking people in the world? NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer… more
- NVIDIA (Santa Clara, CA)
- …power efficiency. + Work with floorplan, performance, verification and emulation methodology and infrastructure development teams to integrate data movement power ... models. + Experiment with various ML techniques to answer what-if design questions and set proper power/energy targets for next generation chips. + Enable efficient storage and retrieval of data from database. + Enable easy visualization of data using… more
- NVIDIA (Santa Clara, CA)
- …power efficiency. + Work with floorplan, performance, verification and emulation methodology and infrastructure development teams to integrate data movement power ... models. + Experiment with various ML techniques to answer what-if design questions and set proper power/energy targets for next generation chips. + Enable efficient storage and retrieval of data from database. + Enable easy visualization of data using… more
- ADM (Des Moines, IA)
- …analyzing bad actors and equipment issues through failure analysis and zero-loss methodology . The Reliability Engineer will also be responsible for proactively ... **92076BR** **Job Title:** Reliability Engineer - Des Moines, IA **Department/Function:** Operations: Manufacturing, Production, Maintenance, Utilities **Job… more
- LSI Solutions (Victor, NY)
- …in a quality system audit + Mentor/Train less experienced personnel on validation methodology Principal Process Validation Engineer + All knowledge skills and ... customer is ultimately the patient. POSITION TITLE: Process Validation Engineer I, II, III, Sr. Days (8am to 5pm)...RANGE: $79,000 - $108,000 JOB SUMMARY: The Process Validation Engineer will develop and execute validations to ensure regulatory… more