- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... 10yrs or MS + 7yrs in EE/CS - 5+ years of experience in developing physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Improvement ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
- Qualcomm (Austin, TX)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer , you will work with ... flows. + Good data analytical skills to identify and root cause physical design issues. **Roles and Responsibilities** + Work with cross functional teams (RTL,… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- NVIDIA (Santa Clara, CA)
- …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical ...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- …today. The NVIDIA Clocks group is looking for a top ASIC Methodology engineer with proven experience in high-speed logic design and verification. In order to ... needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation and… more
- NVIDIA (Santa Clara, CA)
- … Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques ... energy usage in graphics and AI workloads and make improvements in architecture, design , and power management. Today, NVIDIA is tapping into the unlimited potential… more
- NVIDIA (Santa Clara, CA)
- … Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques ... energy usage in graphics and AI workloads and make improvements in architecture, design , and power management. What you'll be doing: + Define and implement tools… more
- Capgemini (San Francisco, CA)
- ** Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San… more
- Qualcomm (Austin, TX)
- …to define, develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL ... and also useful in enabling CPU timing infrastructure and methodology impacting multiple CPU projects in Qualcomm. You will...out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions.… more
- Meta (Austin, TX)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure...data-path intensive designs. 24. Experience in the 3D-IC technology, methodology , and advanced packaging. 25. Experience in validating Power… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- Broadcom (San Jose, CA)
- …features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for the ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
- Broadcom (Irvine, CA)
- … methodology , power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design ... please Sign-In before you apply.** **Job Description:** ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, … more
- Broadcom (San Jose, CA)
- …Power-grid and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at ... Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design or PhD in Electrical Engineering or Computer Engineering with 7+… more
- The City of Rochester, MN (Rochester, MN)
- Civil Design Engineer Supervisor Print (https://www.governmentjobs.com/careers/rochester/jobs/newprint/4670162) Apply Civil Design Engineer Supervisor ... DESCRIPTION The City of Rochester welcomes applications for: Civil Design Engineer Supervisor Nature of Work The...and utilize applicable studies to determine the basic engineering methodology to be employed and basic layout of the… more