• Physical Verification

    onsemi (Richardson, TX)
    …the real world. This position needs a person with a solid background in Physical layout, Physical Verification , and Place and Route automation. **Performance ... Maintains a high level of personal accountability **About You** + 3-5 years of physical layout, verification , and place-n-route experience + Have a strong desire… more
    onsemi (11/10/24)
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  • Physical Design Engineer , Annapurna…

    Amazon (Cupertino, CA)
    …place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification , ECO and sign-off - Develop physical ... and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification , and ECO - Deep understanding on sign-off… more
    Amazon (11/01/24)
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  • Senior SoC Hardware Validation Engineer

    Microsoft Corporation (Hillsboro, OR)
    …with our server and data center infrastructure, security and compliance, operations , globalization, and manageability solutions. Our focus is on smart growth, ... partners worldwide and we are looking for a **Senior SoC Hardware Validation Engineer ** to help achieve that mission. As Microsoft's cloud business continues to grow… more
    Microsoft Corporation (11/20/24)
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  • SoC Hardware (Digital, Analog or PnP) Validation…

    Microsoft Corporation (Hillsboro, OR)
    …with our server and data center infrastructure, security and compliance, operations , globalization, and manageability solutions. Our focus is on smart growth, ... and we are looking for a **SoC Hardware (Digital, Analog or PnP) Validation Engineer ** to help achieve that mission. As Microsoft's cloud business continues to grow… more
    Microsoft Corporation (11/15/24)
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  • Senior Physical Design Engineer

    NVIDIA (Santa Clara, CA)
    …plus. + Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys ... We are now looking for a Senior Physical Design Engineer . NVIDIA has continuously...static timing analysis, power and noise analysis and back-end verification . What we need to see: + BSEE (MSEE… more
    NVIDIA (10/08/24)
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  • Senior SoC Hardware (Analog/Power) Validation…

    Microsoft Corporation (Hillsboro, OR)
    …with our server and data center infrastructure, security and compliance, operations , globalization, and manageability solutions. Our focus is on smart growth, ... worldwide and we are looking for a **Senior SoC Hardware (Analog/Power) Validation Engineer ** to help achieve that mission. Microsoft's mission is to empower every… more
    Microsoft Corporation (11/16/24)
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  • Staff Digital Design Engineer

    Skyworks (Austin, TX)
    Staff Digital Design Engineer Apply now " Date:Nov 12, 2024 Location: Austin, TX, US Company: Skyworks If you are looking for a challenging and exciting career in ... world communicates. Requisition ID: 74380 Job Summary Seeking a digital design engineer with experience and interest in developing complex mixed-signal ICs for… more
    Skyworks (10/15/24)
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  • Sr. R&D Engineer

    Insight Global (Sunnyvale, CA)
    …chip engineering and implementation. This includes Floor planning, clock insertion, prime time, physical verification , and tape out. Pay rate range: $88 - ... (RTL to Gate, Gate-to-Gate) & Formality ECO flows Synopsys ICV for PV ( Physical Verification DRC/ERC/LVS/PERC) o Familiar with Synopsys Lynx a plus o Ability… more
    Insight Global (11/16/24)
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  • Electrical Engineer 2

    Skyworks (Nashua, NH)
    Electrical Engineer 2 Apply now " Date:Nov 7, 2024 Location: Nashua, NH, US Company: Skyworks If you are looking for a challenging and exciting career in the world ... the world communicates. Requisition ID: 72796 Job Description Digital design engineer developing complex mixed-signal ICs for frequency control, clock generation,… more
    Skyworks (11/07/24)
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  • Principal Digital Engineer /Senior…

    Northrop Grumman (Linthicum, MD)
    …development with MATLAB, and SimuLink. + Experience with digital architecture, FPGA physical constraints and achieving timing closure, Formal Verification , Agile ... and DSP algorithms + Collaborate with design leadership and systems, verification , software, hardware teams to design and implement digital subsystem solutions… more
    Northrop Grumman (10/15/24)
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  • ASIC Digital Design Engineer - TPG

    Micron Technology, Inc. (Minneapolis, MN)
    …Design Verification , Analog Design, and Modeling to Synthesis and Physical Implementation. + Participate in advanced packaging discussion and setting customer ... + 1-3 Years + Strong fundamental knowledge of logic design coding and verification techniques, and high-speed IO crossings. + Strong written and verbal… more
    Micron Technology, Inc. (09/17/24)
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  • ASIC Engineer , Implementation

    Meta (Sunnyvale, CA)
    …(SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/ Physical Synthesis using advanced ... for Timing, Area, Power. Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. 2. Perform Power Estimation at RTL and Gate… more
    Meta (10/18/24)
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  • Software Engineer

    nVent (IN)
    …environment and energy monitor product on Linux Platform. * Design, verification , specification, and qualification of data center environment and energy monitor ... Cortex A class chips, with a focus on peripheral application/ IO Experience in debugging using JTAG, SWD and similar...**WE HAVE:** + A dynamic global reach with diverse operations around the world that will stretch your abilities,… more
    nVent (11/12/24)
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  • Design Engineer Intern

    Cadence Design Systems, Inc. (San Jose, CA)
    …(Intellectual Property), from RISC-V processor cores to DSPs to Memory Controllers and IO solutions. Our configurable and extensible IP solutions are poised to meet ... leader in computational software, semiconductor design IP, and system verification hardware. Our customers are the world's most innovative...and Vision Cores. The intern will work with the Physical Design CAD team and R&D to adopt latest… more
    Cadence Design Systems, Inc. (10/29/24)
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  • SoC Architect - Director Level

    Capgemini (San Francisco, CA)
    …all front-end design related tasks. . Drive project milestones across the design, verification , and physical implementations. . Manage interface with Value Chain ... of architecture, micro-architecture, synthesis, timing closure, top level test plans, and verification . . 15 years' experience with SoC design (Digital design and… more
    Capgemini (09/17/24)
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  • Timing Analog/Mixed Signal IC Design - Summer…

    Skyworks (Nashua, NH)
    …performance, create and use behavioral models of blocks, do and/or supervise physical layout, verify circuit and chip-level operation and performance, and assist ... use of behavioral models for simulation of analog and mixed-signal circuits. Verification of analog and mixed-signal sub-systems and the entire chip using… more
    Skyworks (09/27/24)
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