- Esperanto.ai (Mountain View, CA)
- …job is onsite in our Mountain View office Responsibilities:- Work with Architecture, RTL and other teams to determine SoC functionality- Help develop next generation ... architectural model for many core AI SoCRequired Experience:- Worked on at least 3 or more CPU/SoC simulator written in C++ and/or Rust- Understanding of computer architecture- Detailed understanding for one of the following areas: execution pipelines, memory… more
- Capgemini (Santa Clara, CA)
- **Job description:** We at Capgemini engineering are looking for a top-tier RTL Engineer. In this role you will be responsible to setup and run tools like LINT, CDC, ... will work closely with design team to consistently improve RTL quality and ready for synthesis and physical design....You will setup the tools to run when new RTL checked in for any module and review the… more
- Qualcomm (Austin, TX)
- …> CPU Engineering **General Summary:** We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. In this role, you ... Computer or Electrical Engineering with **10+ years** of CPU RTL or similar experience. * Thorough knowledge of microprocessor...as Perl or Python. **Roles and Responsibilities** As an RTL engineer you will own or participate in the… more
- Amazon (Boise, ID)
- …TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer, you will be part of an advanced architecture team that is exploring new ... will be responsible for defining the micro-architecture and implementing the corresponding RTL for advanced functional blocks. You will participate in the design… more
- Qualcomm (Santa Clara, CA)
- …this is where you come in. We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro-architecture and ... RTL Design Engineer, you will work with chip architects...architectural research and arriving at a detailed specification. + RTL ownership. Development, assessment and refinement of RTL… more
- Google (Madison, WI)
- …experience. + 2 years of experience in Digital design using SystemVerilog RTL . Preferred qualifications: + Master's degree or PhD in Electrical Engineering or ... Computer Science. + 4 years of experience in digital/ASIC design using SystemVerilog or RTL . + Experience in one or more successful ASIC products from concept to… more
- Honeywell (Plymouth, MN)
- …project reviews and audits. Key Responsibilities + Design and implement ASICs using RTL coding languages such as Verilog or VHDL. + Collaborate with system ... define design requirements and specifications. + Develop and optimize RTL code for performance, power, and area. + Perform...engineering, or mathematics + 5+ years of experience in RTL design and ASIC development. + Proficiency in … more
- Cadence Design Systems, Inc. (Austin, TX)
- …of technology. Cadence Solutions (North America) team is looking for an experienced RTL designer to contribute to architecture and design for next generation SoCs ... work with verification/validation team to create performance verification plan + RTL development + Support Verification teams. Support test bench development, review… more
- EchoStar (Gaithersburg, MD)
- …the Hardware Group in Wireless Networks and VLSI Engineering, develop, and contribute to RTL Development to design and verify custom ASICs and FPGAs using Verilog. + ... a closely related field plus 2 months' experience in RTL development or Bachelor's degree in Electrical Engineering, Electronics...a closely related field plus 5 years' experience in RTL development. + Experience must include 2 months in… more
- Amazon (Austin, TX)
- …wireless system architecture in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level validation. . Develop ... implementing Digital Signal Processing (DSP) algorithms and systems in RTL . . Ability to convert DSP algorithms into ...RTL . . Ability to convert DSP algorithms into RTL code and optimize for performance, power, and area.… more
- NVIDIA (Santa Clara, CA)
- …infrastructure tools used by design engineers for build and verification of architectural, rtl , and gate level designs. As a software engineer, you will craft highly ... Develop and enhance C++ based software tools to improve RTL design productivity and quality + Research and develop...stand out from the crowd: + Good architecture and RTL design knowledge + Strong expertise in modern C++,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and Signoff including Synthesis, Place and Route, Design Closure, and timing/power signoff, RTL to GDSII. Lead technical campaigns and strategies in the RTL ... Synthesis, Place and Route, IR Drop, backend design timing and power closure, RTL to GDSII. Experience in scripting in Perl/Tcl/Python to automate and implement… more
- Cadence Design Systems, Inc. (Austin, TX)
- …Synthesis, DFT, and Logical Equivalence Checking, Low Power, Power characterization. Expert in RTL Synthesis and ability to rewrite RTL to accomplish improved ... PPA. Experience in scripting in Perl/Tcl/Python to automate and implement process improvement is a must. Experience with advanced technology nodes including Sub 5nm and below. Develop, debug, and optimize various aspects of design flows for SoC's to achieve… more
- BAE Systems (Manchester, NH)
- …on position level and/or job specifics. **Hardware Engineering Manager - RTL Design Verification (Hybrid)** **105415BR** EEO Career Site Equal Opportunity Employer. ... Minorities . females . veterans . individuals with disabilities . sexual orientation . gender identity . gender expression more
- Cadence Design Systems, Inc. (San Jose, CA)
- …is not limited to: + Digital microarchitecture definition and documentation + RTL logic design, debug and functional verification + IP integration and verification ... + Familiar with the PMA/PMD/PCS layers of the Ethernet protocol is a plus. + Understanding of digital architecture trade-offs for power, performance, and area + Understanding of proper handling of multiple asynchronous clock domains and their crossings +… more
- Qualcomm (Austin, TX)
- …* Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, ... Electrical Engineering, Systems Engineering, or related work experience. OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of Hardware Engineering, Software Engineering, Electrical Engineering,… more
- Harvard University (Cambridge, MA)
- …Description: The Program Assistant contributes to the overall goals of the RTL portfolio and provides support across four principal areas of responsibility: ... + In collaboration with Program and Operations Admin for RTL , contributes to administrative services for RTL ...for RTL , contributes to administrative services for RTL portfolio. + Provides administrative support to the … more
- Meta (Sunnyvale, CA)
- …We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, ... Area, Power. Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. 2. Perform...designers to resolve them. 2. Perform Power Estimation at RTL and Gate Level and identify power reduction opportunities.… more
- NVIDIA (Santa Clara, CA)
- …GPUs and networking chips requires the team to provide architecture, micro-architecture, RTL Design, methodology and AI based power optimization solutions. You will ... internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power...that warrant more scrutiny. + Interact with architects and RTL designers to help them interpret their power data… more
- Qualcomm (San Diego, CA)
- …Engineering, or related field. **Job Description:** + Synthesize the Verilog RTL and create models and compile them to emulators like Veloce/Palladium/Zebu ... and push the methodology to improve the area/performance of the synthesized FPGA RTL . + Work on third-party IP integration and system-level debugging. + System level… more
