• Graphics ASICS Hardware Design…

    Qualcomm (San Diego, CA)
    …Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > GPU ASICS Engineering **General Summary:** At Qualcomm, we believe in the power of ... businesses. We are looking for a hardware micro-architects and RTL designers to develop Adreno GPU for Qualcomm Snapdragon...**What you will be doing** : Micro-architect and design RTL for blocks and modules of Adreno GPU architecture… more
    Qualcomm (10/17/24)
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  • ASIC Rtl Design Engineer , Machine…

    Google (Sunnyvale, CA)
    …experience. + 2 years of experience in Digital design using SystemVerilog RTL . Preferred qualifications: + Master's degree or PhD in Electrical Engineering or ... years of experience in digital/ASIC design using SystemVerilog or RTL . + Experience in one or more successful ASIC...you will be part of a team developing cutting-edge ASICs used to accelerate Machine Learning computation in Google's… more
    Google (11/13/24)
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  • Sr. SOC/ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where ... human life on Mars. SR. SOC/ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building… more
    SpaceX (08/24/24)
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  • Digital Integrated Circuit Design Engineer

    The Boeing Company (Huntington Beach, CA)
    …SiGe. SSED uses external wafer fabrication but performs design (architecture, RTL , synthesis, circuits, physical design, verification, packaging and test) in house. ... of these projects. We are seeking a **Digital Integrated Circuit Design Engineer (Mid-Level, Senior or Lead)** with experience developing complex, high-performance … more
    The Boeing Company (11/16/24)
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  • Sr ASIC/FPGA VHDL Design Engineer

    L3Harris (Camden, NJ)
    Job Title: Sr ASIC/FPGA VHDL Design Engineer Job Code: 16594 Job Location: Camden, NJ (relocation can be provided for those that qualify) Schedule: 9/80 Regular with ... of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto… more
    L3Harris (10/07/24)
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  • Sr. DDR IP Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars ... the ultimate goal of enabling human life on Mars. SR. DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and… more
    SpaceX (10/21/24)
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  • ASIC Design Engineer - Cisco Silicon One

    Cisco (San Jose, CA)
    …Your Impact * Be part of the development organization as an ASIC Design Engineer with primary focus on RTL Design * Create micro-architecture specifications and ... designing, developing and testing some of the most complex ASICs being developed in the industry with the opportunity...participate in reviews * Implement Verilog RTL to meet timing and performance requirements * Help… more
    Cisco (11/16/24)
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  • Electrical Engineer II - ASIC/FPGA (Onsite)

    RTX Corporation (Cedar Rapids, IA)
    …for tomorrow. Are you up for the challenge? Join our mission today. Electrical Engineer II - ASIC/FPGA (Onsite) This position is for a motivated Electrical or ... and integration of a wide variety of high-performance digital ASICs and FPGAs applied to signal processing and information...You will implement ASIC / FPGA digital design using RTL . + You will support verification and system integration… more
    RTX Corporation (10/19/24)
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  • ASIC Design Verification Engineer

    Cisco (San Jose, CA)
    …ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Who You'll Work With You will engage ... and review of code and functional coverage. * Ensure RTL quality with qualifying the design with Gate Level...is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation… more
    Cisco (10/01/24)
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  • Semiconductor Design Engineer

    Teradyne (Agoura Hills, CA)
    …Semiconductor Design Engineer , to design high-speed analog circuits in mixed-signal ASICs for ATE (Automatic Test Equipment) instruments. We are looking for a ... and operating conditions + Integration of circuit elements into large analog/mixed signals ASICs + Participation in the characterization and test of ASICs All… more
    Teradyne (11/07/24)
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  • ASIC Engineer , Power

    Meta (Austin, TX)
    …in power architecture definition and power management for large complex disaggregated ASICs , with exposure to power modeling, developing flows around EDA tools, and ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Power Responsibilities: 1. Work with Architecture and Design teams to assess… more
    Meta (10/12/24)
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  • Sr. Physical Synthesis Implementation…

    Qualcomm (San Diego, CA)
    …Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a leading technology innovator, Qualcomm ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog),...physical synthesis with Synopsys Fusion Compiler. + Work with RTL designers on managing complex power intent + Manage… more
    Qualcomm (10/04/24)
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  • Principal Electrical Engineer - ASIC/FPGA…

    RTX Corporation (Cedar Rapids, IA)
    …Are you up for the challenge? Join our mission today. Principal Electrical Engineer - ASIC/FPGA - Advanced Technology (Onsite) This position is for a motivated ... verification, and integration of a wide variety of high-performance digital ASICs and FPGAs applied to signal processing and information assurance products… more
    RTX Corporation (09/20/24)
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  • Senior ASIC Verification Engineer

    Western Digital (Roseville, CA)
    …contribute to pre-silicon verification related to next generation Storage Networking ASICs + Verification Micro-architecture & Documentation for module level and ... test writing + Debugging module level and system level simulation failures + RTL Code Coverage analysis and enhancements + Scripting for automation and productivity… more
    Western Digital (11/16/24)
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  • Low Power ASIC Engineer (Next-Gen,…

    Qualcomm (San Diego, CA)
    …power Memory Subsystem RTL Design, flows and methodology for high performance ASICs in sub-4nm process for mobile, automotive, compute, AI and XR space. An ideal ... Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** Qualcomm is the world leader in wireless… more
    Qualcomm (11/16/24)
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  • SoC Design and Integration Engineer - Sr…

    Qualcomm (San Diego, CA)
    …SoC team responsible for RTL Design, flows and methodology for high performance ASICs in sub-5nm process nodes for mobile, AI, Compute and XR spaces. As new ... Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a leading technology innovator, Qualcomm… more
    Qualcomm (11/16/24)
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  • Power Electronic Research Engineer - LV…

    Ford Motor Company (Dearborn, MI)
    **Power Electronic Research Engineer - LV circuit and ASIC design and layout** We are the movers of the world and the makers of the future. We get up every day, roll ... what it means to drive a Ford. A research engineer position working on design and layout of LV...and layout of LV circuits, research and development of ASICs for traction inverter applications. **What you'll do **… more
    Ford Motor Company (09/05/24)
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  • GPU Integration and Debug Engineer

    Qualcomm (Boxborough, MA)
    …Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > GPU ASICS Engineering **General Summary:** We are looking for a talented and ... self-motivated Digital Engineer to join Qualcomm's Adreno GPUs Command Processor team...* + Analyze snapshot data along with the GPU RTL to determine the state of the device at… more
    Qualcomm (11/14/24)
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  • Principal Design Engineer

    Microsoft Corporation (Raleigh, NC)
    …servers, clients, and augmented reality. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System on Chip ... working on Intellectual Property (IP) microarchitecture specification, Register Transfer Level ( RTL ) design, synthesis, and System on Chip (SOC) integration on… more
    Microsoft Corporation (11/15/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …Engineers within our Infrastructure organization to build cutting edge machine learning ASICs , capable of world class Inference and Training performance. We are ... and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development 3.… more
    Meta (11/15/24)
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