- BOEING (Mesa, AZ)
- …with us.Boeing is currently looking for an Avionics FPGA Design and Verification Chief Engineer at the Principal level to join our team in Hazelwood MO, Plano TX, ... and tools from block-level microarchitecture and through HDL codingPerform static timing analysis, LEC, CDC, linting, and other necessary checks to ensurethe… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...DFX, Clocks, and other teams in coming up with timing closure strategy, creating timing constraints, driving… more
- NVIDIA (Westford, MA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding ... be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at...from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and… more
- SpaceX (Irvine, CA)
- Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON...COMPENSATION & BENEFITS: Pay range: Synthesis and Front-End STA Engineer / Senior : $160,000.00 - $220,000.00/per year Your actual… more
- The Boeing Company (El Segundo, CA)
- …has an exciting opportunity for an ** ASIC and/or FPGA Design and Verification Engineer ** **(Experienced, Lead or Senior )** to join us as part of our Boeing ... Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products...team and third-party IP as needed + Perform static timing analysis, LEC, CDC, linting, and other necessary checks… more
- The Boeing Company (Tukwila, WA)
- …opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal)** to join us as part of our Boeing Electronic Products ... Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products...team and third-party IP as needed + Perform static timing analysis, LEC, CDC, linting, and other necessary checks… more
- Cisco (San Jose, CA)
- …service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon ... breadth of growth opportunities that working in a smaller ASIC team can provide. You will work with exceptional...customer shipments. Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan...timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical… more
- Northrop Grumman (Baltimore, MD)
- …to join our team as a Principal Digital Engineer / Senior Principal Digital Engineer (FPGA and ASIC Design) based out of Linthicum, MD. **What You'll get ... team in Mission Systems that encompasses Digital Engineering to support FPGA and ASIC product development. + Work closely with design engineers and will utilize your… more
- Cisco (San Jose, CA)
- …provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography ... breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact * Write micro-architecture...participate in reviews. * Implement Verilog RTL to meet timing , performance, and power requirements. * Contribute to full… more
- Cisco (San Jose, CA)
- …service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon ... the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact * Participate in and contribute to chip… more
- Tarana Wireless (Milpitas, CA)
- This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + ... circuits using Verilog + Frontend design development and integration of large ASIC designs including: Integration of Processors, Bus, Memory, and Interface IPs +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/ timing clean design. + Collaborate and coordinate with architects, other… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers ... BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...+ You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... design space, create optimum floorplan, drive synthesis, physical implementation, and timing closure by understanding arch/logic as well as dataflow and exhibiting… more
- SpaceX (Irvine, CA)
- …Enjoys being challenged and learning new skills COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer / Senior : $160,000.00 - $220,000.00/per year Your ... Sr. ASIC Design Engineer (Silicon Engineering) at...Sr. ASIC Design Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX... clean design + Participate in all phases of ASIC and/or FPGA design flow (eg synthesis, timing… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... checks, etc. + Help in all aspects of physical design, such as driving timing convergence, timing constraints generation and management, and ECO generation and… more
- Amazon (Austin, TX)
- …Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing . Analyze simulation results, identify and ... & the impact of DFT on the blocks . Perform initial synthesis & timing analysis . Assist verification team in unit verification including test plan development .… more
- Cisco (San Jose, CA)
- …in the world. You will engage in dynamic collaboration with Senior micro-architects, designers, verification engineers and interact with cross-functional software ... working together to ensure the successful deployment of the ASIC in products. Your Impact Key responsibilities: * Development...complex RTL designs. * Implement Verilog RTL to meet timing and performance requirements. * Analyze code coverage and… more
