- SpaceX (Irvine, CA)
- …deadlines, as needed COMPENSATION & BENEFITS: Pay range: Synthesis and Front - End STA Engineer/ Senior : $170,000.00 - $230,000.00/per year Your actual ... Sr . SOC/ASIC Timing Signoff & Front - End Implementation Engineer (Silicon Engineering) at...checks + Full chip and block level front - end implementation from timing constraints development, synthesis ,… more
- NVIDIA (Santa Clara, CA)
- …diverse team creating NVIDIA's chip design methodology! We're responsible for the Front - End Design Implementation methodology for all of NVIDIA's semiconductor ... engineering methodologies + Build flows for methodologies incorporating logic/physical synthesis , design planning, equivalence checking for industry-leading chip designs… more
- Honeywell (Plymouth, MN)
- …You will be responsible for interfacing with customers, running simulations, synthesis , test, and preparation of documentation. You will work closely with ... Perform functional and timing simulations to ensure design correctness. + Conduct synthesis , static timing analysis (STA), and formal verification. + Work closely… more
- Amazon (San Diego, CA)
- …with Perl, Python, tcl, shell and drive to automate flows - Proficiency in chip front - end and back- end implementation tools such as Fusion compiler, Design ... latest generation of Echo devices is looking for a Sr . SOC Design Engineer-STA to continue to innovate on...Architecture, SoC Integration, Verification, DFT, Mixed Signal, IP owners, Synthesis , Place & Route and other local/remote teams to… more
- Skyworks (San Jose, CA)
- …will be participating in developing cutting-edge, state-of-the-art PA, RF switches, LNAs and front - end modules for Automotive and IoT applications to enable the ... Sr . Analog/Mixed Signal Design Engineer Apply now "...op-amps, power detectors, regulators, precision current sources, basic logic synthesis . + Exposure to best analog layout practices in… more
- NVIDIA (Santa Clara, CA)
- …be doing: + You will be responsible for all aspects of front - end design implementation methodologies ( synthesis , formal-equivalence-checking), flow ... We are looking for a Senior CPU Implementation Methodology Engineer to join our...power trade-offs + Should be a power user of synthesis and/or place and route EDA tools from Synopsys… more
- quadric.io, Inc (Burlingame, CA)
- …& Area (PPA) optimization + Contribute to timing closure through full product cycle ( front end , back- end , tapeout) Requirements: + BS/MS or Ph.D. in ... floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will...Engineering with a minimum of five years of CPU/GPU/ASIC front - end design + Proficiency in SystemC, SystemVerilog,… more
- GliaCell Technologies (Annapolis Junction, MD)
- Are you a Senior DevOps Engineer who is ready for a...needed. + Will work across contracts to assist both front - end and back- end development and ... to work with some amazingly talented people Job Description: GliaCell is seeking a Senior DevOps Engineer on one of our subcontracts. This is a full-time position… more
- NVIDIA (Santa Clara, CA)
- …and scalable manner + Identify inefficiencies and improvement opportunities in the front - end chip implementation process and propose ideas to tackle them ... + Own front - end design quality checks and reviews to...across functional teams to build consensus. + Experience in synthesis , padring, and physical design is a plus. NVIDIA… more
- Cadence Design Systems, Inc. (Austin, TX)
- …block/IP success for all target specifications in Silicon Qualifications: 10+ years of Front End design and/or verification.with a BS/MS Engineering or Computer ... RTL design (Verilog), simulators debuggers Hands on Experience in Synthesis , SDC creation and support PD and STA teams....good communication and design management skills Experience with Cadence front end toolset #LI-MA1 We're doing work… more
- University of Southern California (Arlington, VA)
- …Group (RCG) at ISI is a leader in disrupting and advancing the fields of front - end ASIC and FPGA design, reconfigurable architectures, and EDA tools. As an ... Senior Research Engineer IApply (https://usc.wd5.myworkdayjobs.com/ExternalUSCCareers/job/Arlington-VA/ Senior -Research-Engineer-I\_REQ20140783/apply) Viterbi… more
- Northrop Grumman (Baltimore, MD)
- …+ Active DoD Top Secret Clearance or higher + Experience with industry standard ASIC front - end design tools for synthesis , LEC, CDC + Experience with STA ... We are looking for you to join our team as a Principal Digital Engineer/ Senior Principal Digital Engineer (FPGA and ASIC Design) based out of Linthicum, MD. **What… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …learn and improve existing digital flows. The candidate will primarily be responsible for front - end coding, scripting and developing flows at all phases of the ... SerDes as well as a thorough understanding of the end -to- end digital design flow in order to...Lint checks and proper resolution of errors + Understanding synthesis timing constraints, static timing analysis and constraint development… more
- NVIDIA (Santa Clara, CA)
- …responsible for crafting all aspects of SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the chip, ... interacts with the floor-planning and back end teams to help craft the physical floorplan of...+ Experience in RTL design (Verilog), verification and logic synthesis . + Strong coding skills in Perl or other… more
- NVIDIA (Santa Clara, CA)
- …crafting all aspects of GPU and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The clocks team ... interacts with the floor-planning and back end team to help craft the physical floorplan of...+ Experience in RTL design (Verilog), verification and logic synthesis . + Strong coding skills in Perl or other… more
- RTX Corporation (Sacramento, CA)
- …the tasks listed above on your own. Candidates must have experience with both Front - End Digital Design (RTL writing and verification) and Back- End Digital ... with new requirements for design reuse. You will perform Synthesis , Place & Route (P&R), Static Timing Analysis (STA)...flow. Responsibilities to Anticipate: + You will work with senior digital design engineers to design and implement innovative… more
- Pacific Northwest National Laboratory (Richland, WA)
- …At a time when complex environmental problems are emerging on every front , the Nuclear Sciences Division's staff, capabilities, and facilities are delivering science ... and hazardous wastes. Specific areas of noted expertise are in formulation, synthesis , and characterization of vitreous and cementitious materials. RM is looking to… more