• STA Engineer

    Arrow Electronics (San Jose, CA)
    **Position:** STA Engineer **Job Description:** POSITION SUMMARY * Proven experience in constraints (Func/Test) handling, block and top level static timing ... on Automation (Perl/Tcl/Awk/Python) * Able to provide technical guidance to Junior Engineer * Good in communication skill EDUCATION BACKGROUND A Bachelor's degree in… more
    Arrow Electronics (11/04/24)
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  • Sr. SOC Design Engineer - STA

    Amazon (San Diego, CA)
    …is powering the latest generation of Echo devices is looking for a Sr. SOC Design Engineer - STA to continue to innovate on behalf of our customers. We are a part ... development of signoff methodology and corresponding implementation solution - Flow for STA , Crosstalk Delay and Crosstalk Noise analysis for digital ASIC/SoCs. -… more
    Amazon (11/16/24)
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  • Senior CDC and STA Engineer

    NVIDIA (Westford, MA)
    …amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class CDC/ STA Design Engineers to join our outstanding Networking Silicon engineering ... (CDC), Reset Domain Crossing (RDC) and Static Timing Analysis ( STA ) constraints and methodology for our DPUs and SOCs...for DPUs and SOCs. + Develop and maintain key CDC/ STA checks and associated sign-offs for DPUs and SOCs.… more
    NVIDIA (11/14/24)
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  • ASIC STA Engineer

    Cisco (San Jose, CA)
    …noise, while managing ECO tasks. * Your role may include extraction and STA flow development, convergence strategies, and correlation between PNR, Spice, and STA ... practices. * Additionally, you'll develop methodologies, guidelines, and checklists to streamline STA work, resolve design and flow issues, and drive execution to… more
    Cisco (11/08/24)
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  • STA Resident Engineer (Chicago…

    Ford Motor Company (Chicago, IL)
    …BSAQ issues for Glidepath values. + Provide early notification to and engage the STA Site team on potential Stop Shipments related to supplier process (SP). + ... support in containing supplier Stop Ship issues. Assist Site STA team with vehicle On-Hold and Release process tracking....Monitor daily production report (DPR) and provide notification to STA management for issues that require Site STA more
    Ford Motor Company (10/29/24)
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  • Lead STA Solutions Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …constraints, advanced OCV/SOCV concepts, derates, PBA timing, Distributed, Concurrent and Hierarchical STA flows. . Work efficiently with R&D and customer to enable ... basic understanding of Place and route, power analysis. Related tools/Keywords; PrimeTime, STA , Quantus #LI-MA1 The annual salary range for California is $100,100 to… more
    Cadence Design Systems, Inc. (10/01/24)
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  • Implementation Timing / STA Design…

    Qualcomm (San Diego, CA)
    …for skilled engineers to focus on timing constraints development, power analysis, STA , and timing closure for premium-tier chips. This is an excellent opportunity ... to join the Snapdragon implementation team, which is responsible for SoCs in sub-3nm nodes across mobile, AI, and automotive sectors. Candidates should have at least 2 years of experience and be proficient with tools such as Primetime, Fishtail/TCM. Scripting… more
    Qualcomm (09/04/24)
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  • STA Site Engineer

    Ford Motor Company (Dearborn, MI)
    …Lead cross-functional decisions with Ford & Supplier leadership to drive resolution of open issues. . Implement actions to ensure zero vehicle losses from suppliers . ... Principal for on-site troubleshooting and corrective actions for emergency supplier situations . Lead adherence to Ford standards (i At Ford Motor Company, we believe freedom of movement drives human progress. With our incredible plans for the future of… more
    Ford Motor Company (11/09/24)
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  • Sr. SOC/ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    …computer science + 5+ years of experience working as a synthesis and/or front-end STA engineer PREFERRED SKILLS AND EXPERIENCE: + Experience in ASIC multimode ... deadlines, as needed COMPENSATION & BENEFITS: Pay range: Synthesis and Front-End STA Engineer /Senior: $170,000.00 - $230,000.00/per year Your actual level and… more
    SpaceX (08/24/24)
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  • STA /Emir IC Principal Solutions…

    Cadence Design Systems, Inc. (San Jose, CA)
    …to enable new and differentiating technologies.. + In this role, the Solutions Engineer (SE) is expected to work both independently and in collaboration with other ... team members to address customer issues and to identify new opportunities or Risk that are linked to those activities + The SE will interact with Product Engineering/RnD Team as well as Key Technologists at customer site to develop and enable new… more
    Cadence Design Systems, Inc. (10/18/24)
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  • Quality Engineer

    Actalent (Lansing, MI)
    …+ Ensure that open BSAQ projects are up to date by following up with the Resident STA , PVT Engineer , or VRT team + Understand the VRT meeting schedule and build ... Job Title: Quality EngineerJob Description The Quality Engineer will serve as a resident engineer...Communicate concerns to IQ, PVT/VRT, and Supplier Technical Assistance ( STA ) if the plant is not handling parts properly… more
    Actalent (11/08/24)
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  • Staff Software Engineer , Data Engineering

    DoorDash (San Francisco, CA)
    …the foundation for decision-making at DoorDash. About the Role DoorDash is looking for a Sta ff Software Engineer ,Data to be a technical lead and help architect ... about you because + 8+ years of professional experience as a hands-on engineer and technical leader leading multiple projects + 6+ years experience working in… more
    DoorDash (11/05/24)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's leading GPUs and ... You'll Be Doing: + Develop and validate flows for PT- STA regression, analysis, QOR metrics for high-speed designs. The...which is the primary task. + Develop flows/recommendations on STA and PNR in deep submicron physical effects aging,… more
    NVIDIA (09/18/24)
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  • Test Timing Engineer

    Cisco (San Jose, CA)
    …ASICs being developed. Your Impact You are a detail-oriented Test Timing Engineer with strong analytical skills and a deep understanding of timing constraints, ... validation, CDC delay check, and SDC flow development. * STA runs, more specifically at scan modes along with...practices. * Developing methodologies, guidelines, and checklists to streamline STA work, resolve design and flow issues, and drive… more
    Cisco (11/08/24)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... or MS (or equivalent experience) with 2+ years experience in Timing and STA + Hands-on experience in full-chip/sub-chip Static Timing Analysis ( STA ) and… more
    NVIDIA (09/20/24)
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  • Engineering Professional

    ABBTECH Professional Resources, Inc. (Kennedy Space Center, FL)
    This program requires US Citizenship Description: Stress Engineer Per Diems: STA per diems are allowed if hired outside the KSC area (50 miles from the site) ... Remote/Site: On site is highly preferred but will consider remote work Position Summary: Essential duties include performing pipe stress analysis of systems in accordance with ASME B31.3 Code using AutoPipe. The stress work includes the modeling of the piping… more
    ABBTECH Professional Resources, Inc. (10/22/24)
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  • DFT Engineer

    Meta (Austin, TX)
    …stack, from transistor, through architecture, to firmware, and algorithms. As a DFT Engineer at Meta Reality Labs, you will play an integral role in implementing ... products to millions of customers quickly. **Required Skills:** DFT Engineer Responsibilities: 1. Work with the Silicon teams to...on industry standard tools 4. Work with designers on STA , physical, power and logical issues related to DFT… more
    Meta (09/06/24)
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  • Timing Constraint Engineer

    Cisco (San Jose, CA)
    …as a team. Your Impact You are a detail-oriented Timing Constraint (SDC) Engineer with strong analytical skills and a deep understanding of timing constraints, ... including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/ STA tools and scripting for automation, you excel at identifying and… more
    Cisco (11/14/24)
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  • ASIC Engineer , Implementation

    Meta (Sunnyvale, CA)
    …and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using advanced optimization ... reset sequence for RDC. 8. Develop Timing Constraints for RTL-Synthesis and PrimeTime- STA for the blocks and the top-level including SOC. Analyze the inter-block… more
    Meta (10/18/24)
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  • Physical Synthesis Implementation Engineer

    Qualcomm (San Diego, CA)
    …help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... Duties & Responsibilities** - Perform digital synthesis and static timing analysis ( STA ) for complex digital designs. - Collaborate with design, verification and PD… more
    Qualcomm (10/09/24)
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