• Principal Engineer - HBM SOC

    Micron Technology, Inc. (Richardson, TX)
    …that are transforming how the world uses information to enrich life. As an HBM SOC Pre-Silicon Verification Engineer , you will be responsible for the design ... Logic chip can use a full ASIC flow. Lastly, verification and testing (validation) of HBM is the most...exciting. **What's Encouraged Daily:** + Develop test plans at IP/ Subsystem / SOC Level. + Review architectural specifications to… more
    Micron Technology, Inc. (10/24/24)
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  • Low Power ASIC Engineer (Next-Gen,…

    Qualcomm (San Diego, CA)
    …designs. + Strong knowledge in the entire low power, high performance ASIC/ SoC design flows (micro-architecture, RTL design, verification , synthesis, timing/STA, ... This is a great opportunity to join a fast-paced SoC team responsible for development of next Generation, high...development of next Generation, high performance, low power Memory Subsystem RTL Design, flows and methodology for high performance… more
    Qualcomm (11/16/24)
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  • SoC Hardware (Digital, Analog or PnP)…

    Microsoft Corporation (Hillsboro, OR)
    …of Computer Architecture and CPU/ SoC validation principles, including: Understanding of SoC subsystem , SoC system level, and platform level functionality ... trusted experience to customers and partners worldwide and we are looking for a ** SoC Hardware (Digital, Analog or PnP) Validation Engineer ** to help achieve… more
    Microsoft Corporation (11/15/24)
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  • Senior SoC Hardware (Analog/Power)…

    Microsoft Corporation (Hillsboro, OR)
    …to customers and partners worldwide and we are looking for a **Senior SoC Hardware (Analog/Power) Validation Engineer ** to help achieve that mission. Microsoft's ... The Silicon computing development team is seeking a **Senior SoC Hardware (Analog/Power) Validation Engineer ** to join...and CPU/ SoC validation principles, including: Understanding of SoC power delivery, subsystem , SoC more
    Microsoft Corporation (11/16/24)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC 's and GPU's. This ... computing. What you'll be doing: + As a Senior Verification Engineer at NVIDIA, you will be...verification infrastructure, DV strategies and test-planning for memory subsystem units + Collaborate with ASIC designers and architects… more
    NVIDIA (10/25/24)
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  • CPU Verification Engineer (Multiple…

    Qualcomm (Santa Clara, CA)
    …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the ... concepts of CPU and SOC level micro-architectures. You will work on a selected...work on a selected part of the CPU Design Verification to ensure that it functions to the standards… more
    Qualcomm (10/14/24)
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  • Sr. ASIC Design Verification

    Qualcomm (Santa Clara, CA)
    …such as UVM or OVM or similar methodologies. + Experienced in developing IP or Subsystem level or SoC level test planning + Understanding of PCIe and/or CXL ... connected future for all. The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The… more
    Qualcomm (10/14/24)
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  • ASIC Verification Engineer

    NVIDIA (Austin, TX)
    NVIDIA is seeking an outstanding ASIC Verification Engineer to verify the design and implementation of the world's leading SoC 's and GPU's. This position ... of computing! What you'll be doing: + As a Verification Engineer at NVIDIA, you will be... scope, and contribute to the development of the verification infrastructure for memory subsystem units +… more
    NVIDIA (09/24/24)
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  • ASIC Design Verification Engineer

    Qualcomm (Santa Clara, CA)
    …stake holders at different levels of test bench + Work closely with Design, Subsystem / SOC teams on failure debugs, code/functional coverage closure + Debug of ... off and required documentation + Debug and root cause SS/ SOC /post silicon issues in collaboration with Design teams +...teams + Expertise in IP level / Sub-system level verification + Understanding of standard bus protocol like AHB,… more
    Qualcomm (09/21/24)
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  • Telemetry Systems Engineer

    Actalent (Houston, TX)
    subsystem . This includes leading and writing system requirements, SOC , Verification and Validation efforts, design descriptions, budgets, specifications, ... Job Title: 100% Remote Telemetry Systems Engineer Job Description Support mission analysis and requirements...Test (IOT). Responsibilities + Lead and write system requirements, SOC , Verification , and Validation efforts + Create… more
    Actalent (11/10/24)
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  • Consulting Digital Engineer

    Northrop Grumman (Linthicum, MD)
    …technical fields. + Experience leading or managing digital hardware, ASIC, FPGA, SoC , and/or digital subsystem design projects. + Experience leading teams ... Systems (NGMS) Sector is seeking an experienced leader to fill a Consulting Engineer Digital position in the Networked Information Solutions & Payload Ground Systems… more
    Northrop Grumman (11/14/24)
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  • Hardware Systems Engineer

    Meta (Sunnyvale, CA)
    **Summary:** We are seeking a highly skilled Hardware Systems Engineer to join our team at Meta Reality Labs. As a key member of the hardware systems engineering ... to articulate success criteria. Furthermore, you will execute validation and verification activities for new product integration, including system-level and … more
    Meta (11/14/24)
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  • Senior Embedded Software Engineer

    Capgemini (San Francisco, CA)
    …platforms. Android development experience . DV experience of developing tests at complex Subsystem or SOC level test-benches, creating C/C tests that run on ... We are seeking a highly seasoned Lead Embedded Software Engineer to join our dynamic team. In this role,...python. . Experience in post-silicon bring-up and flows for SoC like IP. Experience with lab system debug with… more
    Capgemini (10/29/24)
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  • Senior Embedded Engineer - Embedded…

    Capgemini (San Francisco, CA)
    …platforms. Android development experience + DV experience of developing tests at complex Subsystem or SOC level test-benches, creating C/C tests that run on ... description:** We are seeking a seasoned Senior Embedded Software Engineer to join our dynamic team. In this role,...python. + Experience in post-silicon bring-up and flows for SoC like IP. Experience with lab system debug with… more
    Capgemini (10/29/24)
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  • Senior Embedded Software Engineer

    Capgemini (San Francisco, CA)
    …platforms Android development experience DV experience of developing tests at complex Subsystem or SOC level test-benches, creating C/C tests that run ... using python. Experience in post-silicon bring-up and flows for SoC like IP Experience with lab system debug with...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
    Capgemini (10/25/24)
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  • ASIC Engineer , DFT

    Meta (Austin, TX)
    …implementation, and verification to build best-in-class System on a Chip ( SOC ) and IP for data center applications. We are looking for individuals with ... Engineering or Computer Engineering. 16. Experience with mixed-signal DFT methodologies, at IP subsystem , SOC , or disaggregated SOCs (2.5D or 3D). 17. Experience… more
    Meta (10/18/24)
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  • Sr. Physical Synthesis Implementation…

    Qualcomm (San Diego, CA)
    …help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... implement, and document IP (block/ SoC ) development for a variety of high performance, high...Responsibilities** + Implement Hierarchical blocks of the DDR/system cache subsystem running the physical synthesis with Synopsys Fusion Compiler.… more
    Qualcomm (10/04/24)
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  • Sr. DDR IP Design Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars ... the ultimate goal of enabling human life on Mars. SR. DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and… more
    SpaceX (10/21/24)
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  • Hardware Test Engineer

    Insight Global (New York, NY)
    …and team player . Board and system level validation and debugging experience . FW verification experience . System and Subsystem power verification . . C#, ... Description Insight Global is looking for a Hardware Test Engineer to join one of the world's leading social...different modules and top level systems. Validation coverage includes SoC , low speed signal interface (I2C, I2S, PDM etc),… more
    Insight Global (11/13/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the opportunity to have a real impact in ... responsible for the micro-architecture and design implementation of GPU memory subsystem modules. + Make architectural trade-offs based on features, performance… more
    NVIDIA (11/05/24)
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