• Atlas Graduate Program: Product Engineer

    Siemens Digital Industries Software (Wilsonville, OR)
    …in the area of electronic design automation. You will join the Tessent Embedded Analytics team. Our products consist of on-chip circuitry (embedded instrument) ... and more advanced ICs to market faster. This team is part of the Tessent division, a market and technology leader of electronic design automation (EDA) software… more
    Siemens Digital Industries Software (10/25/24)
    - Save Job - Related Jobs - Block Source
  • Associate Applications Engineer

    Siemens Digital Industries Software (Wilsonville, OR)
    …advance into one of these organizations. Post program opportunities include Field Application Engineer , Corporate Applications Engineer , and Technical ... Simulation, ATPG, Memory BIST, Logic BIST, Boundary Scan | Familiarity with Tessent DFT Software (TestKompress, FastScan, MemoryBIST, Diagnosis) a plus At… more
    Siemens Digital Industries Software (10/25/24)
    - Save Job - Related Jobs - Block Source
  • CPU DFT Engineer

    Qualcomm (San Diego, CA)
    …digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation ... + 5+ years of practical experience with test or DFT + Experience using the Mentor Tessent ...with a disability and need an accommodation during the application /hiring process, rest assured that Qualcomm is committed to… more
    Qualcomm (11/01/24)
    - Save Job - Related Jobs - Block Source
  • DFT Engineer (Austin, TX)

    Qualcomm (Austin, TX)
    …and data processing transformation to help create a smarter, connected future for all. The DFT Engineer will be part of Qualcomm Austin DSP team which is ... as TCL, Perl, etc. + Preferrable experience with Siemens Tessent DFT solutions (eg EDT, iJTAG, SSN)...with a disability and need an accommodation during the application /hiring process, rest assured that Qualcomm is committed to… more
    Qualcomm (09/17/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Design for Test Engineer

    Cisco (San Jose, CA)
    The application window is expected to close on 11/23/2024 This is an onsite role and will require working out of the Milpitas/San Jose office location. Who We Are ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime * Prior experience working with… more
    Cisco (11/01/24)
    - Save Job - Related Jobs - Block Source