- Cisco (San Jose, CA)
- …Who You'll Work With You will be in the Silicon One development organization as an ASIC DFT Technical Program Manager in San Jose, CA with a primary focus on ... the industry. What You'll Do * Work closely with DFT architecting leads to define and the DFT... DFT architecting leads to define and the DFT implementation specifications * Responsible for closely managing the… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and ... EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer, DFT Responsibilities: 1. Develop and implement DFT strategies for… more
- Cisco (San Jose, CA)
- …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
- Qualcomm (San Diego, CA)
- …in digital ASIC design; experience using Verilog or VHDL + Experience with ASIC test, DFT , and debug + 5+ years of practical experience with test ... create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip...designers, implementation engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and… more
- Amazon (San Diego, CA)
- …both logic and physical synthesis flow for various technology nodes. * Work with the ASIC design and DFT teams to understand the design and create timing ... or equivalent experience. * 7+ years of experience in ASIC implementation, ie, synthesis, STA and working with P&R.../ Communications Engineering. * 10+ years of experience in ASIC implementation. * Experience in leading physical design. *… more
- BorgWarner Inc. (Kokomo, IN)
- …tools + Validate, verify and document instrumentation/simulation solutions + Aid in validation of ASIC designs + Aid in DFT (Design for Test) activities for ... Position ASIC Test Engineering Intern Location Indiana Technical Center...for "dynamic, results driven" individual to join as an ASIC Test Engineering Intern. The ASIC Test… more
- Honeywell (Moca, PR)
- …of the ASIC Test Implementation plan to individualize the standardized DFT solutions to the ASIC , including the hierarchical test architecture and ... the strategies to address ASIC -specific DFT requirements. * Insertion of DFT structures, generation, simulation, and validation of test patterns for both … more
- Cisco (San Jose, CA)
- …industry. Who You'll Work With You will work with outstanding talent and vast ASIC development expertise in design, DV, DFT , physical design, and post-silicon ... a system company, so you can also use the ASIC to work with the System and Software teams...What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. *… more
- NVIDIA (Santa Clara, CA)
- …DDR or related protocols. + You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT , timing analysis, floor planning, ... We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to design… more
- Qualcomm (San Diego, CA)
- …transformation to help create a smarter, connected future for all. The Digital ASIC Design Team is currently seeking candidates who will be responsible for the ... implementation and verification of advanced DFT /DFD (Design for Test/Design for Debug) techniques for low...Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.… more
- Insight Global (St. Paul, MN)
- Job Description As a Design-For-Test ( DFT ) Engineer, you will be responsible for designing and implementing advanced DFT architectures and methodologies to ... hardware design, verification, and manufacturing engineers, to develop efficient DFT solutions and implement best-in-class testing practices. We are specifically… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead ... We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In...DDR and SerDes designs through comprehensive Design for Test ( DFT ) verification strategies. You will work collaboratively with cross-functional… more
- Cisco (San Jose, CA)
- …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
- Qualcomm (Austin, TX)
- …data processing transformation to help create a smarter, connected future for all. The DFT Engineer will be part of Qualcomm Austin DSP team which is responsible for ... implementation of DFT architectures and strategies on DSP cores. This person...Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.… more
- Broadcom (Fort Collins, CO)
- …please Sign-In before you apply.** **Job Description:** We are a world class semiconductor ASIC provider. We provide first time correct on schedule ASIC designs ... skilled team of engineers that own and provide the flows that enable our ASIC design teams. This position would focus on developing, testing, and enhancing our … more
- Cisco (San Jose, CA)
- …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
- Western Digital (Roseville, CA)
- …to a third-party ASIC Vendor , including synthesis, static timing, layout, DFT , DRC/LVS checks, power integrity analysis , test vector generation & ASIC ... team of engineers in the design and development of ASIC (Application-Specific Integrated Circuit) designs. + Mentor and coach...synthesis, floor planning, and timing analysis. + Knowledge of DFT (Design for Test) and low-power design techniques. +… more
- Micron Technology, Inc. (San Jose, CA)
- …and groundbreaking technology while rapidly growing your abilities. We are seeking an ** ASIC Architect** for Micron's ASIC architecture team. You should have ... and implementation flow - such as coverage-driven verification, synthesis, P&R, STA, DFT , power-islands, floor-planning, CTS, IR-drop - and an understanding of how… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Engineers within the Infrastructure organization. We are looking for individuals with experience in the entire Silicon Lifecycle, to ... build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Characterization team, you will be part of a dynamic team working with… more
- SpaceX (Irvine, CA)
- Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're… more