• ASIC Engineer , DFT

    Meta (Sunnyvale, CA)
    DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and… more
    Meta (10/18/24)
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  • DFT Engineer

    Qualcomm (San Diego, CA)
    …transformation to help create a smarter, connected future for all. The Digital ASIC Design Team is currently seeking candidates who will be responsible for the ... implementation and verification of advanced DFT /DFD (Design for Test/Design for Debug) techniques for low...Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.… more
    Qualcomm (08/30/24)
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  • Design-For-Test ( DFT ) Engineer

    Insight Global (St. Paul, MN)
    Job Description As a Design-For-Test ( DFT ) Engineer , you will be responsible for designing and implementing advanced DFT architectures and methodologies to ... field. 2. Experience: - 5+ years of relevant experience as a Design-For-Test ( DFT ) Engineer , preferably in the semiconductor or consumer electronics industry. 3.… more
    Insight Global (11/13/24)
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  • HBM/DDR/SerDes DFT Verification Lead…

    Broadcom (San Jose, CA)
    …San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role, you ... Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead… more
    Broadcom (11/06/24)
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  • Senior DFT Engineer

    Cisco (San Jose, CA)
    …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
    Cisco (10/17/24)
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  • DFT Engineer (Austin, TX)

    Qualcomm (Austin, TX)
    …and data processing transformation to help create a smarter, connected future for all. The DFT Engineer will be part of Qualcomm Austin DSP team which is ... responsible for implementation of DFT architectures and strategies on DSP cores. This person...Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.… more
    Qualcomm (09/17/24)
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  • CPU DFT Engineer

    Qualcomm (San Diego, CA)
    …digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation ... in digital ASIC design; experience using Verilog or VHDL + Experience with ASIC test, DFT , and debug + 5+ years of practical experience with test or DFT more
    Qualcomm (11/01/24)
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  • DFT Design Automation Engineer

    Broadcom (Fort Collins, CO)
    …please Sign-In before you apply.** **Job Description:** We are a world class semiconductor ASIC provider. We provide first time correct on schedule ASIC designs ... on proven flows and methodology. As a Design Automation Engineer you will join a highly skilled team of...that own and provide the flows that enable our ASIC design teams. This position would focus on developing,… more
    Broadcom (11/01/24)
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  • ASIC Design for Test Engineer

    Cisco (San Jose, CA)
    …Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... physical design teams to understand chip architecture and drive DFT requirements early in the design cycle. As a...networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow… more
    Cisco (11/01/24)
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  • Sr. SOC/ ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER ...Work closely with chip architecture, design verification, physical design, DFT , and power teams to achieve tapeout success on… more
    SpaceX (08/24/24)
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  • ASIC Engineer - Infra Silicon…

    Meta (Austin, TX)
    …entire Silicon Lifecycle, to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Characterization team, you will be ... ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer - Infra Silicon Characterization Responsibilities: 1. Work across… more
    Meta (11/01/24)
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  • Sr. SOC/ ASIC Physical Design…

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
    SpaceX (11/15/24)
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  • ASIC Engineer , Implementation

    Meta (Sunnyvale, CA)
    …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....with the Designers to create waivers. 5. Perform RTL DFT Analysis and improve the DFT coverage… more
    Meta (10/18/24)
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  • Principal Electrical Engineer - ASIC

    RTX Corporation (Cedar Rapids, IA)
    …tomorrow. Are you up for the challenge? Join our mission today. Principal Electrical Engineer - ASIC /FPGA - Advanced Technology (Onsite) This position is for a ... Solutions team. What You Will Do: + Requirements capture, ASIC / FPGA digital architecture and design using RTL,...validation with advanced lab equipment + Design for Test ( DFT ) and manufacturability issues + Experience with Unix, scripting,… more
    RTX Corporation (09/20/24)
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  • Principal ASIC Digital Design…

    Honeywell (Plymouth, MN)
    …audits. Key Responsibilities + Lead efforts to map customer designs into Honeywell's ASIC technology + Timing constraints + Simulation + Conduct Code Synthesis + ... + Synopsys Design Compiler + Synopsys PrimeTime + Synopsys DFT Compiler + Synopsys VCS + Synopsys TetraMAX +...Degree in Electrical Engineering, Physics + Eight years of ASIC development and deployment experience + Ability and willingness… more
    Honeywell (10/26/24)
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  • ASIC Design Verification Engineer

    Cisco (San Jose, CA)
    …industry. Who You'll Work With You will work with outstanding talent and vast ASIC development expertise in design, DV, DFT , physical design, and post-silicon ... a system company, so you can also use the ASIC to work with the System and Software teams...What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. *… more
    Cisco (10/28/24)
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  • ASIC Engineer II (Intern) United…

    Cisco (San Jose, CA)
    …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
    Cisco (09/14/24)
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  • ASIC Engineer II (Full Time) United…

    Cisco (San Jose, CA)
    …you directly if a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within Cisco, including marketing, system ... of award-winning communications and network processing silicon/ASICs, Cisco's Core ASIC Group will soon begin development of multiple next-generation designs.… more
    Cisco (10/25/24)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most… more
    NVIDIA (10/16/24)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
    NVIDIA (09/20/24)
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