- Cisco (San Jose, CA)
- …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus ... in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and… more
- Cisco (San Jose, CA)
- …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus ... in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and… more
- Cisco (San Jose, CA)
- …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus ... in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and… more
- Cisco (San Jose, CA)
- …manner Who You'll Work With You will be in the Silicon One development organization as an ASIC DFT Technical Program Manager in San Jose, CA with a primary ... in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and… more
- Cadence Design Systems, Inc. (Cary, NC)
- …want to make an impact on the world of technology. We are looking for SoC/ ASIC Digital Design For Test ( DFT ) Architect. An intimate knowledge and experience in ... Verilog testbenches. + Prior15+ years of professional experience in SoC/ ASIC Digital Design with focus on Design for Test...DFT ) + Should be able to work as DFT Architect and Lead the DFT… more
- Cisco (San Diego, CA)
- …You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. ... in crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire Implementation flow and… more
- Western Digital (Roseville, CA)
- …to a third-party ASIC Vendor , including synthesis, static timing, layout, DFT , DRC/LVS checks, power integrity analysis , test vector generation & ASIC ... DUTIES AND RESPONSIBILITIES + Leadership and Team Management: + Lead and manage a team of engineers in the...+ Technical Direction and Innovation: + Provide technical direction on ASIC architecture, design methodologies,… more
- Micron Technology, Inc. (San Jose, CA)
- …to perfection. **Key Responsibilities:** + **Architectural Leadership:** Develop, contribute, and lead ASIC macro and micro-architecture activities for our ... and data/control flows for the controller and its component IPs. + ** Technical Guidance:** Define requirements for ASIC design, verification, physical… more
- Honeywell (Plymouth, MN)
- …Key Responsibilities + Lead efforts to map customer designs into Honeywell's ASIC technology + Timing constraints + Simulation + Conduct Code Synthesis + Test ... within Honeywell Aerospace. You will be responsible for customer technical support of Honeywell's Space Microelectronics portfolio of Radiation-Hardened ICs,… more
- IERUS Technologies, Inc. (Huntsville, AL)
- …customers. * Support and lead project planning, Agile project development, lead proposal estimation and technical proposal write-ups for new program ... You will be responsible for IC development of an FPGA or ASIC from chip architecture definition through release to production. This individual demonstrates… more
- Google (Sunnyvale, CA)
- …and oversee final timing sign-off for complex Application-specific integrated circuits ( ASIC ). + Lead both static timing analysis methodology development ... degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent practical experience. + 10 years of experience… more
- Cisco (San Jose, CA)
- …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus ... crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality...activities. What You'll Do You will be part of ASIC physical design Team which is responsible for full… more
- Broadcom (San Jose, CA)
- …already have a Candidate Account, please Sign-In before you apply.** **Job Description:** Technical Lead for Physical Designs Are you a versatile, senior ... resident expert in areas such as physical design, STA, DFT , and packaging? Have you taped out so many...range of products that keep the globe connected. Our ASIC products division is looking for senior, physical design… more
- The Boeing Company (Huntington Beach, CA)
- …accreditation is the preferred, although not required, accreditation standard. ** Lead ** Education/experience typically acquired through advanced technical ... seeking a **Digital Integrated Circuit Design Engineer (Mid-Level, Senior or Lead )** with experience developing complex, high-performance ASICs, FPGAs, and SoCs (eg… more
- NVIDIA (Santa Clara, CA)
- …DOEs and come up with solutions to complex characterization problems. + Cross functionally lead efforts with design, foundry, DFT , test, Planning and quality to ... root-cause and solve technical problems. + Have the opportunity to influence future ASIC designs to improve test coverage and enable better product yield, test… more
- NVIDIA (Santa Clara, CA)
- …at wafer sort and package level on Automatic Test Equipment (ATE) + Lead multi-functional efforts with DFx, Design, Timing, Test, Foundry to root-cause complicated ... technical problems + Find creative solutions to complex problems and be on front-line to lead showstopper bugs + Have opportunity to influence future ASIC … more