- Northrop Grumman (Jessup, MD)
- …deliver remarkable new advantages to the warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom digital circuits. ... or VHDL RTL + Circuit synthesis, formal verification, and static timing using state-of-the-art digital ASIC design...both are listed below:** **Basic Qualifications for Principal Digital ASIC Circuit Design Engineer Level:** + Bachelor's… more
- Cisco (San Jose, CA)
- **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a ... year of ASIC experience. + Experience with microarchitecture and RTL implementation . + Experience with block/full chip SDC development in functional and test… more
- Northrop Grumman (Jessup, MD)
- …of our mission! Northrop Grumman Mission Systems (NGMS) is seeking a Sr. Staff ASIC Physical Design Engineer to support our growing engineering team in advanced ... Develop automation and flow enhancements to improve processes and implementation efficiencies. + Report ASIC physical design...of ASIC Design + Proficient in backend ASIC design including synthesis and static timing… more
- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC… more
- SpaceX (Bastrop, TX)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC… more
- Meta (Sunnyvale, CA)
- …apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis ... Physical Design Execution for Clock Tree Synthesis and Routing optimization 19. 4 Static timing analysis and verification at different PVT corner 20. 5. Timing ECO… more
- Micron Technology, Inc. (Boise, ID)
- …communicate and advance faster than ever. **Job Description** As an Electrical Design Engineer - (FPGA/ ASIC ) in the Systems Integration Group (SIG) at Micron ... correctness + Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA) + Perform timing closure and...etc. + Familiarity with DDR4+ memory interfaces and their implementation in FPGA/ ASIC designs. + Hands-on experience… more
- Broadcom (Fort Collins, CO)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** ASIC Design Automation Engineer ** Broadcom's ASIC Products Division ... is seeking a Design Automation Software Development Engineer . They will define, develop, deploy and support the...products and usage methodology to a world-wide, cutting edge, ASIC Design technology development and implementation team.… more
- Cisco (Maynard, MA)
- …or Electrical Engineering and 4+ years of related experience * Hands-on experience in ASIC physical design and implementation * Experience with floor planning & ... networks. Acacia's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a...team can provide. Your Impact As a Physical Design Engineer , you will play a key role in the… more
- RTX Corporation (Cedar Rapids, IA)
- …or Computer Engineer that will be involved in the design, implementation , verification and integration of a wide variety of high-performance ASICs, FPGAs, and ... you interested in becoming part of a growing Avionics FPGA/ ASIC team? This position is for a highly experienced,...SoPCs for Collins Avionics solutions. As an engineer in this organization, you will be employing best… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
- Teradyne (North Reading, MA)
- …better business results. Opportunity Overview Our Hardware Engineering team is seeking an FPGA/ ASIC Design Engineer to work with a multi-disciplined team to ... design constraints for placement, timing closure and CDC + Implementation of designs into target technologies using synthesis and...place and route tools + Perform timing analysis using static timing analysis tools. + Perform lab debug of… more
- NVIDIA (Westford, MA)
- …human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering ... area targets. + Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking,...path planning and crafting needed. + Power user of Static Timing tools like Synopsys PrimeTime or Cadence Tempus.… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... full chip level. + Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, timing and… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... full chip level. + Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, timing and… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... timing constraints, driving timing and power convergence, as well as ECO implementation + Apply knowledge and experience to improve timing convergence flows working… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... timing convergence, timing constraints generation and management, and ECO generation and implementation . What we need to see: + BS (or equivalent experience) in… more
- Google (Sunnyvale, CA)
- Senior DFT Static Timing Analysis Engineer , Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... AI/ML-driven systems. In this role, you will work on the physical implementation of Application-specific integrated circuits ( ASIC ) using advanced technology… more
- Broadcom (Allentown, PA)
- …Candidate will work closely with the IP and SOC design teams to enable block and ASIC level timing closure. + The engineer will work with the internal ASIC ... you apply.** **Job Description:** Candidate would be required to work on Design Implementation activities related to complex digital and mixed signal IP blocks used… more
- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was...for testability (DFT) planning + Collaborate with chip architects, ASIC engineers, package engineers and block level physical design… more
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