- Cadence Design Systems, Inc. (San Jose, CA)
- …environment + Position requires proficiency in using CAD tools for circuit simulation, layout , and physical verification + Cadence tool experience, lab test ... At Cadence , we hire and develop leaders and innovators...impact on the world of technology. The Principal Analog IC Designer is responsible for the design and development… more
- Skyworks (Andover, MA)
- …includes familiarity with Agilent ADS and/or Cadence Spectre/RF simulation tools, Cadence Virtuoso IC Layout , Momentum/Sonnet/HFSS EM simulation tools, ... s-parameters, stability etc., as well as familiarity with design tools like ADS/ Cadence is required. Exposure to a lab testing setup and environment including… more
- Northrop Grumman (Linthicum, MD)
- …custom circuit design. + Experience with modern IC design tools ( Cadence Virtuoso) for schematic capture and custom layout ; physical verification using ... required. **This position can be filled at the Principal IC Layout Engineer OR the Sr. Principal...+ Experience with modern IC design tools ( Cadence Virtuoso) for schematic capture and custom layout… more
- Skyworks (Cedar Rapids, IA)
- IC Layout - Summer Intern Apply now " Date:Oct 10, 2024 Location: Cedar Rapids, IA, US Company: Skyworks If you are looking for a challenging and exciting career ... layout techniques including the ability to build, place, and route active and passive IC devices. + Classroom experience in the layout of bulk CMOS blocks. +… more
- Cadence Design Systems, Inc. (San Jose, CA)
- At Cadence , we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Description: Your role will be to meet ... leading to deployment of an efficient analog and mixed signal methodology using Cadence tools (Virtuoso). It requires a very good understanding of customer flow &… more
- MIT Lincoln Laboratory (Lexington, MA)
- …integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, silicon, compound-semiconductor, ... of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon-based, compound-semiconductor, and heterogeneous/hybrid… more
- Northrop Grumman (Linthicum, MD)
- …PhD). + Demonstrated experience with hands-on custom circuit design. + Experience with IC custom design tools ( Cadence Virtuoso) for schematic capture, circuit ... Engineers to join our team in the design and layout of custom, low-power, analog and mixed signal circuits....experience with hands-on custom circuit design. + Experience with IC custom design tools ( Cadence Virtuoso) for… more
- Northrop Grumman (Mcclellan, CA)
- …Signal Circuit design or 3 years' experience with a master's degree. + Proficiency with Cadence Virtuoso or similar IC design software + Working knowledge of the ... IC design flow including schematic capture, simulation, and layout . + Strong understanding of RF network and resonator...or 3 years with a PhD). + Proficiency with Cadence Virtuoso or similar IC design software… more
- Northrop Grumman (Mcclellan, CA)
- …Mixed Signal Circuit design (3 years with technical MS). + Experience with IC custom design tools ( Cadence Virtuoso) for schematic capture, circuit simulation, ... our Sacramento, California design center in the design and layout of custom, low-power, analog and mixed signal cryogenic...or 3 years with a PhD). + Experience with IC custom design tools ( Cadence Virtuoso) for… more
- Northrop Grumman (Linthicum, MD)
- …get to Do:** Candidate will be expected to coordinate and lead a team of IC designers and layout engineers to produce high performing, low noise RF circuits. ... extensive hands-on custom circuit design experience. + Working knowledge of the IC design flow including schematic capture, simulation, layout , and physical… more
- Global Foundries (Malta, NY)
- …scripting languages ( Python, Perl, Tcl , Bash ) is a plus. + Exposure to Cadence IC (Virtuoso Layout , Schematic or Skill programming language) is a plus. ... GlobalFoundries Process design kits including support of EDA tools from vendors like Cadence , Synopsys and Siemens . + Create PDK related documentation . +… more
- Teledyne (Camarillo, CA)
- …background with CMOS semiconductor IC design including performing full custom analog IC layout . + Thorough understanding of deep sub-micron layout design ... for a **Senior Manager, Digital and Analog Mixed Signal IC Design** to be responsible for leading the product...Strong background with full custom circuit, block, and chip layout using Cadence Virtuoso tools, Layout… more
- BorgWarner Inc. (Kokomo, IN)
- Position Sr. Staff Analog IC Design Engineer Location Indiana Technical Center in Kokomo, Indiana. About Us BorgWarner is a global product leader in delivering ... driven" individual to join as a Sr. Staff Analog IC Design Engineer. The Sr. Staff Analog IC...designs meeting functional and yield requirements + Work with layout designer to implement layout of circuit… more
- Skyworks (Irvine, CA)
- …and optimum layout for performance, and die size trade off. + Proficient with Cadence tools + Layout experience using the Cadence flow, including LVS and ... Sr. Manager, IC Design Engineering Apply now " Date:Oct 23,...same time! We are looking for a highly motivated IC Design Engineering Manager to contribute to RF Front… more
- Lightmatter (Mountain View, CA)
- …DRC/LVS rule deck implementation, to scripting development. You will also work with IC layout designers in taping out our chips. Responsibilities + Administer ... this role, you will be responsible for supporting our IC design teams from PDK administration, supporting layout...teams + Support design flows from EDA vendors like Cadence , Synopsys, Mentor, Keysight, Ansys, and others + Write… more
- Skyworks (Irvine, CA)
- Staff Analog IC Design Engineer Apply now " Date:Nov 1,... for performance, and die size trade off + Layout experience using Cadence flow, including LVS ... of semiconductor physics and strong circuit intuition/simulation skills utilizing Cadence is necessary Job Requirements + BSEE and 8...PhD and 3 years. MSEE preferred + Demonstrated Analog IC design experience using SOI CMOS + Proficient with… more
- Skyworks (Irvine, CA)
- …matching and stability. + Hand's on design responsibility including overview of detailed IC layout , lab evaluation, and back-fitting of designs. + Presentation ... Sr. PA/HBT IC Design Engineer Apply now " Date:Oct 10,...experience with design simulation tools or equivalent - APD, Cadence Virtuoso + Familiar with analog circuit design principles… more
- Insight Global (Irvine, CA)
- …noise coupling and optimum layout for performance, and die size trade off - Layout experience using Cadence flow, including LVS and DRC. Ability to work with ... understanding of semiconductor physics and strong circuit intuition/simulation skills utilizing Cadence is necessary -115,000-150,000 We are a company committed to… more
- Power Integrations (San Jose, CA)
- …+ Mixed-mode integrated circuit design for switching power supply: + Simulation with Cadence tools. + Layout supervision and verification. + Preparation of test ... circuit blocks and device physics. + Understanding of digital IC design. + Familiar with Cadence simulation tools, and Verilog. + Excellent written and oral… more
- Skyworks (Irvine, CA)
- Sr. Principal RF SOI IC Design Engineer Apply now " Date:Oct 13, 2024 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and exciting ... We are seeking engineering talent with expertise in developing RF/Microwave RF SOI IC design in the concept, design, integration, and delivery of complex multi-chip,… more