- Broadcom (San Jose, CA)
- …candidate will be responsible for various key tasks in the areas of chip integration and RTL design of cutting-edge network switch/routing designs. The day-to-day ... 1). Defining in the microarchitecture and implementing design of chip top level modules for L2/L3 Network Switching and...ASICs and various subsystems within these chips. 2). Doing chip level integration and putting all the functional blocks,… more
- Meta (Austin, TX)
- … Engineer , Reality Labs Responsibilities: Responsible for System on Chip and end-to-end system validation plan development, execution and sign-off Identify ... teams (ie, architecture, Intellectual Property, Firmware, Electrical Engineering, System on Chip , and product engineer teams) to generate validation reports… more
- Google (Sunnyvale, CA)
- …architecture and its integration within AI/ML-driven systems. As a System on a Chip (SoC) Physical Design Engineer , you will collaborate with Register-Transfer ... SoC Physical Design Engineer corporate_fare Google place Sunnyvale, CA, USA Mid...Level (RTL), Design for Testing (DFT), Floorplan, and full- chip Sign off teams. Additionally, you will solve technical… more
- Capgemini (San Francisco, CA)
- …our business with semiconductor clients through comprehensive solutions in chip design, software, hardware, supply chain, and sustainability. Key Responsibilities: ... their journey towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors… more
- Northrop Grumman (Baltimore, MD)
- …career. Northrop Grumman Mission Systems is seeking a Staff Electromechanical Design Engineer to join our team of qualified, diverse individuals. This position will ... and production support of state-of-the-art RF, digital, and mixed signal multi- chip modules (MCMs), Printed Wiring Boards (PWBs), and Circuit Card Assemblies… more
- LinkedIn (Mountain View, CA)
- …Contribute to LinkedIn's liquid-cooling deployment strategy, assessing various direct-to- chip cooling technologies, comparing performance tradeoffs and operational ... such as phase imbalance, protection coordination, thermal irregularities, and liquid-to- chip cooling system failures. Basic Qualifications Bachelor's Degree in… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …impact on the world of technology. We are seeking a highly skilled Design Engineer to join our Palladium Solutions Development team, to drive the development of ... developing and integrating and validating high speed interface [Serdes, Chip 2 chip link] based subsystems in Emulation Platforms. Development includes Parallel… more
- Broadcom (Irvine, CA)
- …Core Switching Group is seeking a candidate for an ATE Test Development Engineer . Products include networking switches for NIC, Scale Up, Scale Out, Scale Across ... to independently develop test programs, including complex test flows to support chip specifications around performance and power consumption Must be able to support… more
- Meta (Sunnyvale, CA)
- …"Apply to Job" online on this web page. Required Skills: ASIC Engineer , Design Verification Responsibilities: Leverage Design Verification experience to build IP and ... System On Chip (SoC) and develop innovative ASIC solutions for data...towards creating a first-pass silicon success. Furthermore, the ASIC Engineer , Design Verification will define and implement IP/SoC verification… more
- RTX Corporation (Tewksbury, MA)
- …lifecycle support of Raytheon products. REBEP has an opportunity for an Electrical Engineer who is seeking to use their strong academic background and professional ... Transmitter subsystems. The successful candidate to fill this Senior Hardware Design Engineer role will employ their working knowledge of Circuit Card Assemblies and… more
- Applied Materials (Santa Clara, CA)
- …global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service ... wherever you may go. Learn more about our benefits (https://hrportal.ehr.com/applied/) . Mechanical Engineer IV Who We Are Applied Materials is the global leader in… more
- Apple (Irvine, CA)
- …We have an opportunity for a forward-thinking and unusually hardworking Wireless System Engineer . As a member of our multi-faceted group, you will have the rare ... executing the PHY and radio level characterization on internal silicon solution from chip back until shipping in your favorite Apple products. You will engage with… more
- Apple (Cupertino, CA)
- …to join a team transforming hardware technology? We are searching for a hardworking engineer to join our exciting team of problem solvers. Come join our team and ... tasks for the high quality IP deliverables. Description As an ASIC STA Engineer , you will have responsibilities spanning various aspects of SOC design: Full … more
- Oracle (Harrisburg, PA)
- Job Description As a Senior Principal Data Center Engineer , you will focus on OCI data center mechanical infrastructure. A mix of technical breadth and depth is ... services. Working knowledge and design ability for data center direct-to- chip fluid cooling technologies, including using liquid-to-liquid, liquid-to-air, single-phase… more
- Apple (San Diego, CA)
- …Test and Validation, and FW/SW engineering. Description As a SOC Verification Engineer , you will be responsible for pre-silicon RTL verification of block and ... part of a very dedicated team you will be at the heart of the chip design effort collaborating with all fields. Minimum Qualifications BS with 10+ years relevant… more
- Meta (Sunnyvale, CA)
- …to GDSII in low power and high-performance designs to build efficient System on Chip (SoC) and IP for data center applications. Required Skills: ASIC Engineer , ... physical design Preferred Qualifications: Preferred Qualifications Experience in full chip floor planning, partitioning, budgeting, and power grid planning… more
- Teradyne (Irvine, CA)
- …team is looking for a highly motivated, energetic and driven Field Application Engineer , who will work collaboratively with the team as well as independently to ... and deployment of test solutions for Digital, High-Speed Digital, System on Chip , Mixed Signal and Analog semiconductor devices. Test program software development,… more
- Apple (San Francisco, CA)
- Role Number: 200628369-3401 Summary As a WSoC integration and validation engineer , you will be responsible for the integration and optimization of physical layer ... in wireless communication systems. Description Your role will involve chip -level bring-up and Digital Signal Processing (DSP) implementation, collaborating with… more
- Micron Technology, Inc. (Folsom, CA)
- …California is seeking a highly experienced Custom Layout and High-Speed I/O Design Engineer to help shape the future of memory solutions for AI and high-performance ... computing. In this role, you will lead full- chip floorplanning, top-level synthesis, and layout development for advanced HBM designs, while architecting high-speed… more
- Apple (Santa Clara, CA)
- …In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional ... products to millions of customers quickly. Description As a CPU Verification Engineer owning the verification of a certain area of functionality in a CPU design, you… more
