• Senior Physical Design Engineer (Icb4)

    Broadcom (San Jose, CA)
    …Inc. has brought some of the most complex and cutting edge networking ASIC's and multi- chip solutions to market over the last decade. These products support the ... . Physical verification and timing closure for block and chip -level. . Static and dynamic IR drop analysis, signal...Innovus, Calibre, LEC, PrimeTime etc is highly desirable. Full chip tapeout experience based on 3nm technologies is preferred.… more
    Broadcom (11/27/24)
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  • Senior C++ Software Engineer - Chip Design…

    NVIDIA (Santa Clara, CA)
    …of the GPU in 1999 fueled the growth of the PC gaming market , redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep ... and intelligence. Make the choice to join us today! Chip Modeling and Packaging CAD team is responsible for...rtl, and gate level designs. Our tools enable our chip design teams to work on state-of-art design technologies… more
    NVIDIA (12/04/24)
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  • Senior C++ Software Engineer - Chip Design…

    NVIDIA (Santa Clara, CA)
    …of the GPU in 1999 fueled the growth of the PC gaming market , redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep ... a software engineer, you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: + Work as a… more
    NVIDIA (10/13/24)
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  • Software Dev Engineer Intern - Machine Learning…

    Amazon (Cupertino, CA)
    …ever-changing environment. Key job responsibilities As a member of the ML chip architecture team, you will be responsible for accelerating large-scale machine ... this position ranges from $47.84/hr in our lowest geographic market up to $96.15/hr in our highest geographic ...market up to $96.15/hr in our highest geographic market . Pay is based on a number of factors… more
    Amazon (01/03/25)
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  • Software Dev Engineer Intern - ML Chip

    Amazon (Cupertino, CA)
    …ever-changing environment. Key job responsibilities As a member of the ML chip architecture team, you will be responsible for accelerating large-scale machine ... this position ranges from $47.84/hr in our lowest geographic market up to $96.15/hr in our highest geographic ...market up to $96.15/hr in our highest geographic market . Pay is based on a number of factors… more
    Amazon (12/27/24)
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  • Woodland Manager

    Packing Corp of America (International Falls, MN)
    …compliance to best management practices. + Responsible for SOX compliance with open market , purchased chip , and controlled wood fiber purchase programs. Uses ... and supplemental biomass for energy generation. + Manage inventories of roundwood, chip and biomass. + Coordinate fiber supply changes with mill operations and… more
    Packing Corp of America (12/25/24)
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  • Sr. EM/MCM Design Engineer

    Skyworks (San Jose, CA)
    …development of front-end modules for the fast-paced and highly competitive cellular handset market . As a Multi- Chip Module Design Engineer, you will be ... engineering team to translate customer specifications into design requirements at the multi- chip module (MCM) level. b) Responsible for designing multi- chip more
    Skyworks (11/15/24)
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  • Product Engineer Silicon Debug - US

    Siemens Digital Industries Software (Austin, TX)
    …individual as Product Engineer, specializing in design-for-test (DFT) and test delivery/debug at chip and system level. Tessent is the market and technology ... deliver better products in the increasingly complex world of chip , board and system design. **Position Overview** The Tessent...Develop and validate debug strategies for DFT at the chip and system level + Lead beta programs and… more
    Siemens Digital Industries Software (01/09/25)
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  • Product Development Engineer

    NVIDIA (Santa Clara, CA)
    …part of product engineering, you will drive our latest architecture designs to market . + Implement CP ( chip probing) test processes to improve manufacturing ... efficiency for our latest GPUs, built in leading-edge process technology. + Identify and resolve yield bottlenecks, analyze and drive test failures, wafer & package level failures on Automatic Test Equipment (ATE). + Propose DOEs and come up with solutions to… more
    NVIDIA (12/22/24)
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  • Dermatology Physician

    Baylor Scott & White Health (Waco, TX)
    …On the-rise by TripAdvisor in 2018. Home to such attractions as Baylor University, Magnolia Market (of HGTV's Chip and Joanna fame) and the Dr Pepper Museum, ... Waco's small-town feel and low cost of living belie its vibrant, entrepreneurial scene. Arts, entertainment, sports and over 400 acres of park space are just a few of the city's unique charms. **About Baylor Scott & White Health** As the largest not-for-profit… more
    Baylor Scott & White Health (12/10/24)
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  • Sr. Hadware System Design Engineer

    Broadcom (San Jose, CA)
    …Core Switching Group (CSG) is at the forefront of developing large and integrated system-on- chip (SoC) devices for various market segments from SMB to Datacenter ... and Cloud Computing. Our team is dedicated to designing Silicon validation, reference, and production boards using cutting-edge Broadcom SOCs. **Job Description:** We are seeking a highly motivated Hardware Design Engineer with a strong focus on system design… more
    Broadcom (11/02/24)
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  • Manager

    RWJBarnabas Health (New Brunswick, NJ)
    …health needs in compliance with IRS guidelines + In conjunction to the CHIP Coordinator, coordinate all aspects of the work of the Healthier Middlesex Consortium ... and in carrying out the objectives outlined in the Community Health Improvement Plan ( CHIP ) + Work with community partners to further define the scope of CHIP more
    RWJBarnabas Health (12/31/24)
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  • Principal / Senior Principal Microelectronic…

    Northrop Grumman (Baltimore, MD)
    …and production support of state-of-the-art RF, digital, and mixed signal multi- chip modules (MCMs), Printed Wiring Boards (PWBs), and Circuit Card Assemblies ... (CCAs) using various substrate materials and chip -scale packaging technologies + Collaboration within a cross-functional Integrated Product Team (IPT); effective and… more
    Northrop Grumman (12/31/24)
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  • Senior E/E & Semiconductor Engineer - ASIC…

    Capgemini (San Francisco, CA)
    …Physical Design Engineer will be responsible for taking ownership of the physical chip development, executing from the inception of the design (RTL or gate netlist) ... flow including routing, static timing closure, EM/IR analysis and chip finishing.** **Job Responsibility:** * Chip level floor...strategy and design to engineering, all fueled by its market leading capabilities in AI, cloud and data, combined… more
    Capgemini (10/16/24)
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  • DRAM Pathfinding and Architecture Lead

    Micron Technology, Inc. (San Jose, CA)
    …Gather and interpret data from various sources, including technical papers, patents, market reports, and physical chip analysis. **Desired Experience** + MS/PhD ... for leading the pathfinding and solution strategy for achieving the product market requirements of Micron's next generation LPDDR products partnering closely with… more
    Micron Technology, Inc. (12/25/24)
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  • Sr Public Health Proj Spec

    University of Rochester (Rochester, NY)
    …be determined by considering factors including, but not limited to, market data, education, experience, qualifications, expertise of the individual, and internal ... for interventions identified in the Community Health Improvement Plan ( CHIP ). This may involve researching best-practices and evidence-based interventions, attending… more
    University of Rochester (12/17/24)
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  • Design Engineering Manager

    Skyworks (Austin, TX)
    …group. + Develop new product ideas, architects and develops analog/power ICs that meet market requirements. + Acts as a technical chip lead, manage chip ... CMOS/BiCMOS fabrication processes + Comfortable making complex technical judgements at the chip level that involve tradeoffs in risk, area, power, schedule and… more
    Skyworks (12/11/24)
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  • Integrated Circuit Design Engineer

    Actalent (Fort Collins, CO)
    …We are seeking an experienced package design engineer for complex flip- chip -BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power ... efficiency improvements for our design team. Responsibilities + Design complex flip- chip -BGA packages for high-speed SerDes and high-power delivery needs. +… more
    Actalent (01/09/25)
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  • Mixed Signal Test Engineer

    Broadcom (Irvine, CA)
    …and analog-to-digital circuitry, as well as supporting circuitry on automotive market ICs. * Devise statistically and scientifically sound methodologies to determine ... newly designed integrated circuits for automotive sensing/communications. * Work closely with chip , package and board designers to improve the testability and test… more
    Broadcom (01/04/25)
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  • Senior ASIC Physical Design Engineer, Netlisting

    NVIDIA (Santa Clara, CA)
    …of the GPU in 1999 sparked the growth of the PC gaming market , redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep ... in 1999 sparked the growth of the PC gaming market , redefined modern computer graphics, and revolutionized parallel computing!...GPUs, SoCs at block level, cluster level, and/or full chip level, with a focus on netlist-related aspects such… more
    NVIDIA (12/25/24)
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