• Senior Analog Layout Engineer

    Capgemini (San Francisco, CA)
    …digital-to-analog converters, PLL, transceivers, etc. Responsibilities include leading IC layout of cutting-edge high-performance, high-speed CMOS integrated ... **Required Skills** + .10 years' experience in high performance analog layout in advanced CMOS process. + .Experience in IC layout of cutting-edge… more
    Capgemini (01/17/25)
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  • CAD Engineer

    NVIDIA (Santa Clara, CA)
    …plus year of work experience + A basic understanding of mosfet device behavior, CMOS layout , and VLSI design. + Excellent programming skills; experience with ... perl, Cadence SKILL, C++, tcl. + Great interpersonal skills + Passionate about providing excellent support for end-users. NVIDIA has some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our… more
    NVIDIA (12/12/24)
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  • Sr./Principal HBM CAD Engineer - TPG

    Micron Technology, Inc. (Richardson, TX)
    …Familiarity with memory design preferred (DDR3/4/5, LP3/4/5, HBM, NAND) + Knowledge of CMOS circuit design, layout and verification + Knowledge and experience ... of mixed-signal, transistor-level custom IC design including logical design, custom layout , parameterized cells, automated place and route tools, physical design… more
    Micron Technology, Inc. (11/21/24)
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  • CMOS Device Engineering, Dmts - TPG

    Micron Technology, Inc. (Boise, ID)
    …communicate and advance faster than ever. Drive the development of next generation CMOS devices employed in the most ground breaking Memory and Compute in Memory ... products. Responsible for developing novel CMOS solutions for the future generations of DRAM and emerging memories necessary to meet the required array efficiency… more
    Micron Technology, Inc. (12/07/24)
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  • Senior Mask Layout Design Engineer

    NVIDIA (Santa Clara, CA)
    …of Photonics, CMOS , Electronics, and Systems engineers + Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ... design experience + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. Validated...of analog circuit layout concepts in submicron CMOS technologies. Validated experience with Cadence custom circuit design… more
    NVIDIA (11/15/24)
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  • Advanced CMOS Device & Process Integration…

    Micron Technology, Inc. (Boise, ID)
    …the world to learn, communicate and advance faster than ever. As an Advanced CMOS Device & Process Integration Engineer, you will play a crucial role in the ... development of current and future CMOS technology. You will be responsible for device and...with teams across the organization including Process, Circuit, Design, Layout , Product Engineering, and Modeling/TCAD. Your expertise will be… more
    Micron Technology, Inc. (01/10/25)
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  • Principal Layout Engineer

    ManpowerGroup (San Jose, CA)
    …and layout verification checks (LVS, DRC) + Full analog layout design and layout size optimization of CMOS JI and SOI + Collaborate with Analog and Power ... Sr. Layout Engineer **SUMMARY:** A fast-growing Power Management division...circuit layouts + Understanding of semiconductor process technologies like CMOS JI and SOI + Experience working with voltages… more
    ManpowerGroup (01/02/25)
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  • Advanced CMOS Process Integration SMTS…

    Micron Technology, Inc. (Boise, ID)
    …faster than ever. We are seeking senior technical leaders in the field of CMOS Process integration to join Micron Boise, team. As a Senior member of technical ... mentoring fellow engineers. Your expertise will be instrumental in developing cutting-edge CMOS technology solutions for DRAM memory applications. In addition to a… more
    Micron Technology, Inc. (01/02/25)
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  • Senior Mask Layout Design Engineer

    NVIDIA (Santa Clara, CA)
    …integration would be excellent to have. + Deep understanding of analog circuit layout concepts in submicron CMOS technologies + Validated experience with Cadence ... If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to...circuits, general I/O's, ESD structures designs in innovative sub-micron CMOS technologies using Cadence tools + You'll work with… more
    NVIDIA (01/13/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …LVS decks such as Dracula, Hercules, Calibre. + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. + Experience with analog ... from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join...blocks of a successful IC design in groundbreaking sub-micron CMOS technologies using Cadence tools. + You'll work multi-functional… more
    NVIDIA (01/16/25)
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  • Power Amplifier Design Engineer

    Skyworks (Andover, MA)
    …PA bias circuit designs + RFIC/PA design experience using GaAs HBT, SiGe BiCMOS, GaN, or CMOS + Experience with IC layout tools and layout planning + ... In-depth knowledge of on-chip ESD protection strategies + Expertise in Keysight ADS, Cadence, and associated simulation engines + Familiar with 2.5D (EMX, Momentum, Sonnet) and 3-D (HFSS, FEM) EM design simulation tools + Knowledge and understanding of… more
    Skyworks (11/05/24)
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  • Staff Failure Analysis Engineer

    Power Integrations (San Jose, CA)
    …is required. Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required. + Verbal and reading, ... skills in Mandarin is required. + Excellent English speaking, reading and technical writing skill is required. + Candidates with direct experience in customer interface on resolution of customer quality problems will be given special consideration. +… more
    Power Integrations (01/21/25)
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  • Senior Failure Analysis Engineer (Automotive)

    Power Integrations (San Jose, CA)
    …+ Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required. Preferences will be given ... to candidates who have a thorough understanding of analog, mixed-signal, or power semiconductor operational characteristics and the ability to apply fault isolation techniques at chip level as well as PCB at power supply system level. Education: + Must have BS… more
    Power Integrations (01/08/25)
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  • Senior Application Failure Analysis Engineer

    Power Integrations (San Jose, CA)
    …+ Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required. Power Integrations is committed ... to building teams that drive innovation and therefore review a range of factors when determining compensation. The annual base pay range for this position is $95,913 - $144,599. Our salary ranges are determined by role, level, qualifications and work location.… more
    Power Integrations (11/26/24)
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  • Lead Analog Mixed-Signal Layout Design…

    The Boeing Company (Huntington Beach, CA)
    …and ability to work with a cross-functional team + Experience in analog/mixed-signal layout design of deep sub-micron CMOS circuits + Experience implementing ... growth. Find your future with us. Boeing is seeking a **Lead** **Analog Mixed-Signal Layout Design Engineer** to join our team in **Huntington Beach, CA** . We are… more
    The Boeing Company (01/13/25)
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  • Integrated Circuit (IC) Layout and Mask…

    MIT Lincoln Laboratory (Lexington, MA)
    …(CCD) imagers, 193-nm lithography, fully depleted silicon-on-insulator (FDSOI) CMOS electronics, semiconductor diode lasers and amplifiers, superconducting ... vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, silicon, compound-semiconductor,… more
    MIT Lincoln Laboratory (12/11/24)
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  • Silicon IC Layout Designer

    Skyworks (Cedar Rapids, IA)
    Silicon IC Layout Designer Apply now " Date:Jan 10, 2025 Location: Cedar Rapids, IA, US Company: Skyworks If you are looking for a challenging and exciting career in ... the way the world communicates. Requisition ID: 74743 Overview Skyworks Cedar Rapids Layout team is seeking a Principal Layout Designer responsible for the… more
    Skyworks (12/13/24)
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  • Sr. Principal Layout Designer

    Skyworks (Cedar Rapids, IA)
    Sr. Principal Layout Designer Apply now " Date:Jan 20, 2025 Location: Cedar Rapids, IA, US Company: Skyworks If you are looking for a challenging and exciting career ... ID: 74876 Overview Skyworks Cedar Rapids design center is seeking an experienced Layout Designer responsible for the layout of Analog integrated circuits,… more
    Skyworks (01/20/25)
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  • Principal/Sr. Principal Analog Mixed Signal IC…

    Northrop Grumman (Linthicum, MD)
    …Northrop Grumman Mission Systems (NGMS) is seeking motivated and experienced Integrated Circuit (IC) Layout Engineers to join our team in the design and layout ... advanced nodes as well as more conventional planar technologies. Experience with layout and modeling of transmission lines and inductors is desirable. Candidate will… more
    Northrop Grumman (01/25/25)
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  • Analog Layout Design Intern

    Cadence Design Systems, Inc. (Cary, NC)
    …make an impact on the world of technology. The Cadence SSG Group custom layout team develops and delivers a variety of high-quality high-speed and high-accuracy ... CMOS integrated circuits IP for several foundries on their...As part of Cadence, the Cadence IP group custom layout team not only enjoys access to unlimited licenses… more
    Cadence Design Systems, Inc. (10/29/24)
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