• CAD Engineer - TPG

    Micron Technology, Inc. (Atlanta, GA)
    …with memory design preferred (DDR3/4/5, LP3/4/5, HBM, NAND) Knowledge of CMOS circuit design , layout and verification, and in-depth experience ... flows enable all aspects of mixed-signal, transistor-level custom IC design including logical design , custom layout...design , logical design and net-listing + CMOS digital and analog layout , Cadence Skill… more
    Micron Technology, Inc. (09/20/24)
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  • SPF/Spice CAD Engineer - TPG

    Micron Technology, Inc. (Richardson, TX)
    …Familiarity with memory design preferred (DDR3/4/5, LP3/4/5, HBM, NAND). + Knowledge of CMOS circuit design , layout and verification. + CMOS ... The tools and flows enable all aspects of mixed-signal, transistor-level custom IC design including logical design , custom layout , parameterized cells,… more
    Micron Technology, Inc. (10/25/24)
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  • Senior CAD Engineer, Physical Design

    NVIDIA (Santa Clara, CA)
    …5 years industry experience. + Have an in-depth understanding of mosfet device behavior, CMOS layout , and VLSI design . + Experience working with standard ... with an in-depth understanding of circuits, layouts and VLSI design and enjoy working on the cutting edge of...cell design & layout . + Great interpersonal skills. + A passion for… more
    NVIDIA (10/08/24)
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  • Semiconductor Design Engineer

    Teradyne (Agoura Hills, CA)
    …ASICs for ATE (Automatic Test Equipment) instruments. We are looking for a candidate with CMOS design and layout experience who has successfully taped out ... of multiple, high frequency and high scale of integration mixed signal integrated circuits + CMOS FinFET (16nm or lower) design experience is a plus + Thorough… more
    Teradyne (11/07/24)
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  • Layout Design Engineer

    Micron Technology, Inc. (Atlanta, GA)
    …related field. Position requires education or experience in: 1. CMOS Circuit Design ; 2. Creating physical layout of circuits; 3. Device physics, including ... learn, communicate and advance faster than ever. Create physical layout of transistors, resistors, and capacitors for digital and...schematic. Work on floor planning, routing, and power bus design . Work and support the efforts of groups such… more
    Micron Technology, Inc. (08/28/24)
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  • CMOS Device Engineering, Dmts - TPG

    Micron Technology, Inc. (Boise, ID)
    …communicate and advance faster than ever. Drive the development of next generation CMOS devices employed in the most ground breaking Memory and Compute in Memory ... products. Responsible for developing novel CMOS solutions for the future generations of DRAM and...merit. + Lead and drive multi team efforts across Design , TCAD and modelling groups. + Strong collaboration is… more
    Micron Technology, Inc. (09/07/24)
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  • Engineer - NAND CMOS Device Integration…

    Micron Technology, Inc. (Boise, ID)
    …Engineers to define transistor targets, provide accurate transistor models, and improve layout -constrained Design Rules. + Collaborate with the TCAD simulation ... in Semiconductor Device Technology. + Experience in the field of CMOS device design , simulation, and characterization. + Experience in developing advanced logic… more
    Micron Technology, Inc. (11/14/24)
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  • Intern, DRAM CMOS integration and device

    Micron Technology, Inc. (Boise, ID)
    …be part of a world-class team in charge of developing the next generation CMOS devices employed in the most groundbreaking Memory and Computer products. You will ... work on developing CMOS solutions for the future generations of DRAM and...impact on overall product figures of merit Collaborate with Design , TCAD and modelling groups Collaborate with product, probe,… more
    Micron Technology, Inc. (09/26/24)
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  • Engineer - NAND CMOS Device - TPG

    Micron Technology, Inc. (Boise, ID)
    … Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules + Work with TCAD simulation group to ... + _5 plus years industry experience in the field of CMOS device design , simulation, characterization_ + _Experience in developing advanced logic transistor… more
    Micron Technology, Inc. (11/02/24)
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  • Advanced CMOS Process Integration SMTS…

    Micron Technology, Inc. (Boise, ID)
    …faster than ever. We are seeking senior technical leaders in the field of CMOS Process integration to join Micron Boise, team. As a Senior member of technical ... mentoring fellow engineers. Your expertise will be instrumental in developing cutting-edge CMOS technology solutions for DRAM memory applications. In addition to a… more
    Micron Technology, Inc. (10/03/24)
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  • Intern - NAND CMOS Development

    Micron Technology, Inc. (Boise, ID)
    …world to learn, communicate and advance faster than ever. As an Intern on the NAND CMOS team, you will focus on evaluation and read out of test structures that have ... been built on various test chips. This intern will identify improved design rules, device configurations and additional tasks. **Responsibilities will include:** +… more
    Micron Technology, Inc. (10/31/24)
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  • Integrated Circuit (IC) Layout and Mask…

    MIT Lincoln Laboratory (Lexington, MA)
    …CurvyCore o Programming in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our exceptional career opportunities include ... the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and characterization,… more
    MIT Lincoln Laboratory (09/12/24)
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  • ASIC/IC Layout Engineer

    Actalent (Morrisville, NC)
    Layout Design Engineer who is innovative and has a passion for IC Layout design of high-speed CMOS Interface D2D and SERDES for next generation ... ASIC/IC Layout Design Engineer- REMOTE Summary: Microsoft...designs high performance mixed signal ASICs in leading edge CMOS technology using custom IC design tools.… more
    Actalent (11/15/24)
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  • Senior Mask Layout Design Engineer

    NVIDIA (Santa Clara, CA)
    layout design experience + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. Validated experience with Cadence custom ... Are you a Mask Layout Design Engineer who is seeking...CMOS , Electronics, and Systems engineers + Perform physical layout for mixed-signal functions like PLL's, high speed I/O… more
    NVIDIA (11/15/24)
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  • Senior Photonic Layout Design

    NVIDIA (Santa Clara, CA)
    …of Photonics, CMOS , Electronics, and Systems engineers + Conduct chip layout circuit design , circuit checking, and device evaluation and characterization. + ... outstanding opportunity? We are looking for a Senior Photonic Layout Design Engineer - someone who is...design experience + Deep understanding of analog circuit layout and Silicon Photonic concepts in CMOS more
    NVIDIA (09/14/24)
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  • Senior Mask Layout Design Engineer

    NVIDIA (Santa Clara, CA)
    …you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing group of ... TSMC N5/N4/N3 is preferred. + Experience with high-speed SerDes/RF layout design is helpful and Experience with...excellent to have. + Deep understanding of analog circuit layout concepts in submicron CMOS technologies +… more
    NVIDIA (10/14/24)
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  • Senior/Principal Layout Designer - DRAM…

    Micron Technology, Inc. (Atlanta, GA)
    …DRAM Design group and our other engineering groups to apply multiple layout techniques to design and verify digital and analog circuits. Lastly, our ... Must have 10 + years of experience in analog layout designs in sophisticated CMOS processes. +...as per provided specifications. + Should have expertise in layout area and routing optimization, design rules,… more
    Micron Technology, Inc. (09/03/24)
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  • Analog Layout Design Intern

    Cadence Design Systems, Inc. (Cary, NC)
    …tools Additional Job Description . Pursuing BSEE, MSEE . Exposure to microelectronics design and requirements . Understanding of layout effects on the circuit ... the world of technology. The Cadence SSG Group custom layout team develops and delivers a variety of high-quality...and delivers a variety of high-quality high-speed and high-accuracy CMOS integrated circuits IP for several foundries on their… more
    Cadence Design Systems, Inc. (10/29/24)
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  • Intern - Layout Designer

    Micron Technology, Inc. (Boise, ID)
    …communicate and advance faster than ever. As a Layout Designer in the DEG Layout Design group, you will create innovative layout to support Commodity, ... will also be expected to demonstrate your understanding of CMOS device physics and electrical characteristics through innovative designs....This feedback will be taken directly all through the design cycle leading to layout changes and… more
    Micron Technology, Inc. (09/09/24)
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  • Intern - DEG IP Layout Engineer

    Micron Technology, Inc. (Folsom, CA)
    …tools and techniques to make a sophisticated leading-edge layout design . **Responsibilities** + Understand the basic CMOS cross-section components. + ... to learn state of the art memory technologies for layout design in the most advanced DRAM...and Calibre verification tools. **Requirements** + Basic understanding of CMOS process and CMOS circuit layout more
    Micron Technology, Inc. (09/17/24)
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