- NVIDIA (Santa Clara, CA)
- …are looking for: + BS/MS/PhD or equivalent experience in CS/CE/EE/Mathematics. + 5+ years of formal verification of GPU / CPU designs. + Solid understanding ... Nvidia's Central Formal Verification Team is seeking a highly motivated FV Engineer with a background in AI to help in the development and integration of AI… more
- Meta (Harrisburg, PA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... On Chip (SoC) for data center applications. As a Formal Verification Engineer , you will...verification of complex compute blocks such as DSP, CPU , GPU or HW accelerators 20. Experience with complex… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for Formal Verification Engineer to help verify the design and implementation of industry's leading CPUs and other High Performance ... Computing Solutions. As a Formal Verification Engineer , you will...years of experience in CS/CE/EE/Mathematics. + Solid understanding of GPU/ CPU architectures and designs. + Strong analytical skills to… more
- NVIDIA (Santa Clara, CA)
- As a Formal Verification Engineer at NVIDIA, you will work in the formal verification team for the industry's leading chips. We are looking for ... The engineer will own the task of formal verification of RTL units for next...verification techniques. + Strong knowledge of architectures of CPU /GPU designs and digital logic. + Understanding of abstraction… more
- NVIDIA (Santa Clara, CA)
- …the team and see how you can make a lasting impact on the world. As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of ... In this position, your responsibilities will be to verify the micro-architecture using formal verification tools, define the verification scope, and ensure… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals with ... to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache coherency...to stand out from the crowd: + Experience with formal verification or assertion-based verification … more
- Microsoft Corporation (Raleigh, NC)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** + Establish yourself ... environments in industry standard languages like SVTB UVM or formal verification . + 3+ years of experience...with industry standard languages like Python or C/C++. + Verification experience as part of a CPU ,… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Chip (SoC) for data center applications. As a Design Verification Engineer , you will be part of...or more of the following areas along with functional verification -SV Assertions, Formal , Emulation 12. Experience in… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Chip (SoC) for data center applications. As a Design Verification Engineer , you will be part of...or more of the following areas along with functional verification -SV Assertions, Formal , Emulation 12. Experience in… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation 14.… more
- Capgemini (Seattle, WA)
- **Job Description:** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal candidate ... areas in addition to functional verification : + SystemVerilog Assertions (SVA) + Formal Verification + Emulation + Experience with EDA tools and scripting… more
- Microsoft Corporation (Raleigh, NC)
- …will manage and optimize the Cloud infrastructure. We are looking for a **Principal Verification Engineer ** to join the team. **Responsibilities** + Lead an SoC ... environments in industry standard languages like SVTB UVM or formal verification . + 2+ years of pre-silicon...Memory Controller/PHY IPs, DDR protocols, and related firmware/BIOS/MRC + CPU cores, protocols, and related firmware + Coherent and… more
- Meta (Austin, TX)
- …from transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement ... test benches for block, IP, sub-system, and SoC level verification 2. Develop functional tests based on verification...verifying ARM/RISC-V based sub-systems and SoCs 14. Experience verifying CPU /GPU designs 15. Experience in one or more of… more
- Cadence Design Systems, Inc. (Austin, TX)
- …pre-silicon verification activities, including Lint, Clock Domain Crossing (CDC), Formal Verification (FV), and other quality checks. Collaboration: Work ... projects. This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion for innovation and a proven track record of success in… more
- Oracle (Santa Clara, CA)
- …West Coast Hardware Development_** _organization seeks to add a Principal FPGA Electrical Engineer to work with our FPGA, electrical, mechanical, SI and power teams ... on a product team with full ownership responsibilities!_ _As an Electrical Design Engineer focusing on FPGA design, you will be responsible for system level and… more
- Meta (Sunnyvale, CA)
- …Peripheral Subsystems or Video Codec designs 12. Synthesis, Timing Closure or Formal Verification Methodology 13. TCL, Python, Perl, or Shell-scripting 14. ... Job" online on this web page. **Required Skills:** ASIC Design Engineer Responsibilities: 1. Responsible for micro-architecture development. 2. Perform RTL… more
- Meta (Sunnyvale, CA)
- …NOC, Memory and Peripheral Subsystems 9. Experience with Synthesis, Timing Closure and Formal Verification Methodology 10. Master's or PhD degree in Electrical ... learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development… more
- Caterpillar, Inc. (Kennett Square, PA)
- …abilities in roles including (but not limited to): + **Product Design:** Engineer components & systems for Caterpillar products to meet our customers' needs. ... [Sensors and actuators], speed calculation, injection/spark timing, memory management, CPU optimization, multi core design and implementation etc. In addition,… more
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