• Senior C++ Software Engineer - Chip

    NVIDIA (Santa Clara, CA)
    engineer , you will craft highly efficient software to automate and facilitate chip design and verification processes. What You'll be Doing: + Work as ... team is responsible for development and support of infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level… more
    NVIDIA (10/13/24)
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  • Sr. EM/MCM Design Engineer

    Skyworks (San Jose, CA)
    …front-end modules for the fast-paced and highly competitive cellular handset market. As a Multi- Chip Module Design Engineer , you will be responsible for ... Market:San JoseNearest Secondary Market:Palo Alto Job Segment: Front End, Telecom, Telecommunications, Design Engineer , Systems Engineer , Technology,… more
    Skyworks (09/27/24)
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  • Senior Applied LLM Engineer , AI…

    NVIDIA (Santa Clara, CA)
    …that's fueled by phenomenal technology-and outstanding people! As part of Nvidia's applied LLM chip design team, you will have the opportunity to tap into the ... unlimited potential of AI and change the landscape of chip design at Nvidia and throughout the...LLM-powered solutions for engineering assistants and multi-turn, multi-modal dialogue systems . + Make a difference by leveraging AI technologies… more
    NVIDIA (10/11/24)
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  • Chip Package Signal and Power Integrity…

    Google (Sunnyvale, CA)
    …+ Experience in cross-functional collaboration with chip top design , physical design , STA, package, system design , and validation teams. + Experience ... Engineer you will be responsible for the chip package design with signal/power integrity simulation...Engineers. You will work with various cross-functional teams, including Chip Design , System Design more
    Google (10/11/24)
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  • Staff Hardware Engineer , Chip

    Lightmatter (Mountain View, CA)
    …first optical computers, consider joining the team at Lightmatter! In this role, you will design , develop, build, and test photonic systems that are key to our ... You will also interact with device, hardware, and software design teams to assist in the overall development of...Engineer to join our Photonics team to drive chip bring-up, testing and characterization of our Silicon Photonics… more
    Lightmatter (10/30/24)
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  • Manager, Systems Development Engineering…

    Google (Sunnyvale, CA)
    …or IT-related field, or equivalent practical experience. + 8 years of experience with system design . + 5 years of experience with managing technical work, ... design . Preferred qualifications: + Experience in EDA Tools/ Chip Design . + Experience interacting with the...aptitude. + Experience with using Go, Python and C++. Systems Development Engineering (SDE) at Google is a role… more
    Google (10/23/24)
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  • Senior Principal Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …and innovators who want to make an impact on the world of technology. Senior Principal Design Engineer - Systems and Interfaces San Jose Job Description: The ... CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence...designs. This Systems CAE will use advanced system design tools to integrate and validate… more
    Cadence Design Systems, Inc. (10/08/24)
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  • Senior Silicon Circuits System

    NVIDIA (Santa Clara, CA)
    …server, mobile, and automotive markets! What you will be doing: + As a Silicon Circuit System design engineer for NVIDIA's family of chips and products, you ... to lead show-stopper bugs to enable product shipment. + Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW… more
    NVIDIA (11/02/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …and problem-solving skills. + Experience in RTL design (Verilog), verification (UVM, System Verilog), System -On- Chip design /integration flow, and ... footprint that is responsible to our environment. The NVIDIA System -On- Chip (SOC) group is looking for a...ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and… more
    NVIDIA (10/24/24)
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  • Senior E/E & Semiconductor Engineer - ASIC…

    Capgemini (San Francisco, CA)
    **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... Power, IR and Physical Verification at both block and chip level *Understanding constraints and fixing design /timing...ICC/ICC2, PTSi, and Cadence EDA Tool Suite *Experience in Design Automation and UNIX system . *Experience in… more
    Capgemini (10/16/24)
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  • Digital Design Engineer

    Skyworks (Austin, TX)
    Digital Design Engineer Apply now " Date:Oct...etc. + Verification of digital sub- systems , mixed-signal sub- systems , and the entire chip using a ... communicates. Requisition ID: 72122 Job Summary Seeking a digital design engineer with experience and interest in...etc. + Verification of digital sub- systems , mixed-signal sub- systems , and the entire chip using a… more
    Skyworks (08/08/24)
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  • Sr. Hadware System Design

    Broadcom (San Jose, CA)
    …experience + 8-10 years of proven experience as a Hardware Systems Design Engineer , with a focus on system design and development. + Expertise in PCB ... is at the forefront of developing large and integrated system -on- chip (SoC) devices for various market segments...are seeking a highly motivated Hardware Design Engineer with a strong focus on system more
    Broadcom (11/02/24)
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  • Staff Digital Design Engineer

    Skyworks (Austin, TX)
    Staff Digital Design Engineer Apply now " Date:Oct 14, 2024 Location: Austin, TX, US Company: Skyworks If you are looking for a challenging and exciting career ... communicates. Requisition ID: 74380 Job Summary Seeking a digital design engineer with experience and interest in...etc. + Verification of digital sub- systems , mixed-signal sub- systems , and the entire chip using a… more
    Skyworks (10/15/24)
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  • Silicon Packaging Design Engineer

    Meta (Menlo Park, CA)
    …Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for advanced custom silicon comprising single- chip /multi- chip and 3D ... **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical...and analyses, package design /layouts based on silicon chip IO, electrical performance and system ID/form… more
    Meta (10/18/24)
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  • Engineer II - FPGA Design

    BAE Systems (Westminster, CO)
    …of Education. + Solid electronic circuit design and electronic systems background. + Digital system partitioning and advanced function implementation ... **Job Description** ** Engineer II FPGA Design ** **US CITIZENSHIP...strong execution. **What You ll Do:** + Apply innovative design techniques to create defense-oriented, cutting-edge electronic systems more
    BAE Systems (11/03/24)
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  • Sr Principal FPGA Design Engineer

    BAE Systems (Westminster, CO)
    …may be available based on position level and/or job specifics. **Sr Principal FPGA Design Engineer - $10K Sign On Bonus** **104282BR** EEO Career Site Equal ... continual learning and strong execution. **What You ll Do:** + Apply innovative design techniques to create cutting-edge space electronic systems . + Design more
    BAE Systems (11/02/24)
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  • RF Design Engineer

    Insight Global (Chelmsford, MA)
    … designs and architectures from DC to 40GHz- Identify viable architectures, complete system and chip -level design trades including frequency planning, spur ... of military, commercial, and satellite applications. As a RF/Microwave Design Engineer , you will be responsible for...design tools including Microwave Oce (MWO/VSS) or Advanced Design System (ADS + GENESYS) - Customer… more
    Insight Global (10/23/24)
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  • Engineer II - FPGA Design

    BAE Systems (Westminster, CO)
    …processing algorithms, and communication interfaces/protocols. + Apply innovative design techniques to create defense-oriented, cutting-edge electronic systems ... implementation of high-speed digital electronics, FPGAs, and embedded processor systems are desired. + Excellent FPGA design ...be available based on position level and/or job specifics. ** Engineer II - FPGA Design ** **106316BR** EEO… more
    BAE Systems (10/10/24)
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