- Cisco (San Jose, CA)
- …and Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as ... ASIC in deployment-mode applications * You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the… more
- Cisco (San Jose, CA)
- …developed in the industry. What You'll Do You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the ... Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as part… more
- Textron (Wilmington, MA)
- …the products we make\! **_About This Role_** Textron Systems is looking for a FPGA/ASIC Design Verification \( DV \) Engineer whose primary job function ... **UVM Design Verification Engineer III** **Description** \!\ * \! **_Who We Are_** Textron Systems is part of Textron, a $14 billion, multi\-industry company… more
- Capgemini (San Francisco, CA)
- **Job role:** **Lead DV IP Verification Engineer ** **Job Location : San Francisco CA / Sunnyvale CA** **Job description:** Architect and Create ... end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Lead DV IP Verification… more
- Qualcomm (Austin, TX)
- …DV & Emulation methodology and support, you will work with RTL, architecture, design , DV , software and silicon verification users. Interfaces with various ... from conceptualization to productization (ie, architecture definition, feasibility, pre-silicon design and verification , and post-silicon validation) that meet… more
- Qualcomm (Austin, TX)
- …a DV Infrastructure Engineer focusing on the methodology and support of RTL design verification , you will work with design , verification , and CAD ... and external vendors. Collaborate with both CAD and front-end design teams in productizing solutions to enable faster and...and architect flow solutions tied to internal and vendor-based RTL/ Verification CAD tools. + Interact with DV … more
- Qualcomm (Santa Clara, CA)
- …Summary:** As a CAD Engineer focusing on the methodology and support of RTL design verification , you will work with architecture, design , software and ... the design methodology and high level requirements in support of design verification . + Collaborate with chip leads to determine other areas to support… more
- Qualcomm (Santa Clara, CA)
- …**Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Design Verification Lead, you will lead a team of ASIC design ... a team defining the processes, methods and tools for design verification of large complex IP blocks...+ 8+ years or more of practical semiconductor ASIC DV experience including owning end-to-end verification of… more
- Cisco (San Jose, CA)
- …You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon One ... Specific responsibilities include: * Architect block, cluster and top-level DV environment infrastructure. * Develop DV infrastructure...other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC… more
- Capgemini (San Francisco, CA)
- **Job Title: Design Verification Infrastructure Engineer ** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job Description:** **Key Responsibilities:** ... + .Assist the design verification leads to develop software for...to develop software for internal solutions/generators to support SoC DV and Firmware engineers. + .Support existing DV… more
- BAE Systems (Nashua, NH)
- …Other incentives may be available based on position level and/or job specifics. ** Design Verification Engineer - FPGA - (Sign-on Bonus)** **107618BR** ... career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect,...your leadership skills while leading small to medium sized DV teams + Create reusable Verification IP… more
- BAE Systems (Nashua, NH)
- … Verification Manager to work within our Electronic Systems business area leading a Design Verification ( DV ) group. We are interested in candidates with ... Leading and managing a team of Design Verification engineers + Hiring and staffing DV ...closure for complex Electronic Warfare systems + Prior Project Engineer / Control Account Manager (CAM) experience, including managing… more
- Texas Instruments (Dallas, TX)
- …know Texas Instruments will have a part in shaping it.** Texas Instruments is seeking Design Verification Engineer . In this role you will confirm the ... based on analysis of specifications and reliability. As a Design Verification Engineer you may...LED drivers etc. As an AMS DV Engineer , you will have responsibility for driving design… more
- Cisco (San Jose, CA)
- …Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers... verification engineers, designers, hardware and cross-functional teams to verify… more
- Qualcomm (Santa Clara, CA)
- …+ Develop test plans to verify WiFi Standards, creating test sequences, and validating design components + Own end-to-end DV tasks from coding Test benches, test ... degree in Science, Engineering, or related field and 4+ years of ASIC design , verification , validation, integration, or related work experience. OR Master's… more
- Capgemini (Sunnyvale, CA)
- …**Sunnyvale CA - Onsite role** **Job description:** We are seeking Mixed signal Design Verification Engineer who is proficient in system verilog ... _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification Engineer_ **Location:** _CA-Sunnyvale_… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... improve verification efficiency. **Qualifications:** + Minimum 3 years of DV experience using uvm/assertion based verification technologies + Experience in… more
- Qualcomm (Santa Clara, CA)
- …adapt to changing industry trends **Required skillset:** + Experience in HDL, verification , and general computational logic design / verification concepts + ... degree in Science, Engineering, or related field and 2+ years of ASIC design , verification , validation, integration, or related work experience. OR Master's… more
- Cisco (San Jose, CA)
- …customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development of simulation ... with outstanding talent and vast ASIC development expertise in design , DV , DFT, physical design ,...* Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and… more
- Qualcomm (Santa Clara, CA)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects ... Verification Plans and Testbenches for your functional domain. + Execute Verification Plans, including Design Bring-up, DV environment Bring-up,… more