• DFT Design Automation

    Broadcom (Fort Collins, CO)
    …time correct on schedule ASIC designs by relying on proven flows and methodology. As a Design Automation Engineer you will join a highly skilled team of ... DFT techniques + Semiconductor Static Timing Analysis + Design Automation and Flows development + Linux **Additional Job Description:** **Compensation and… more
    Broadcom (11/20/24)
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  • DFT Design Engineer , AWS…

    Amazon (Austin, TX)
    …is possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block designers to ... integrate DFT implementations * Work with physical design ...between test quality and test time - Experience with automation script development Preferred Qualifications - MS degree in… more
    Amazon (09/27/24)
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  • ASIC Engineer , DFT

    Meta (Austin, TX)
    …ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and verification to build ... data center applications. We are looking for individuals with strong background in Design for Testability ( DFT ) methodologies and implementation for IP/SOC, with… more
    Meta (10/18/24)
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  • Design Verification and DFT

    Broadcom (Mendota Heights, MN)
    …you already have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** Design Verification and DFT Engineer ** We are looking for ... Engineering Group and be part of a memory subsystem design team responsible for the development of large memory...implement assertions and check coverage + Create and verify DFT deliverables **Skill Set Required** + Good understanding of… more
    Broadcom (11/14/24)
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  • Senior Principal DfT & Test Engineer

    onsemi (Richardson, TX)
    …to lead in innovation. Grow your career in the Advanced Solutions Group as a Senior DfT Test Engineer to have an immediate impact on achieving our vision. With ... grade ICs. Knowledge of Analog / Mix Signal Blocks, DFT and test / HW design requirements...as vehicle electrification and safety, sustainable energy grids, industrial automation , and 5G and cloud infrastructure. With a highly… more
    onsemi (09/24/24)
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  • Principal Software Engineer , DFT

    Cadence Design Systems, Inc. (Austin, TX)
    …the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to ... Design Systems is looking for a highly motivated engineer to work with the Modus Test R&D team working on Design For Test ( DFT ) and Automatic Test Pattern… more
    Cadence Design Systems, Inc. (11/15/24)
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  • Senior Product Test Engineer

    onsemi (Richardson, TX)
    …test method libraries for current and new IPs. Knowledge of Analog / Mix Signal Blocks, DFT and test / HW design requirements and care abouts is a critical ... to **own, participate, lead, and drive below activities:** + Definition of Design -for-Test ( DfT ) and Built-In-Self-Test (BIST) techniques for complex analog and… more
    onsemi (11/09/24)
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  • Systems Development Engineer , OISL Test…

    Amazon (WA)
    Engineer with a background in the requirements management, design for manufacturing, hardware/software development for hardware test. Export Control Requirement: ... hardware development team * Work concurrently with the design engineers to provide design for testability ( DFT ) feedback throughout the design process *… more
    Amazon (11/16/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …group is looking for a top ASIC Engineer with a curiosity about SOC design automation , RTL integration, chip build and assembly, and padring design and ... Are you looking for an SOC Design Engineer opportunity? If yes, come...chip design , specializing in SOC integration and design automation . + Excellent analytical and problem-solving… more
    NVIDIA (10/24/24)
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  • Sr. SOC/ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...logic equivalency and other signoff checks) + Develop/improve physical design methodologies and automation scripts for various… more
    SpaceX (11/15/24)
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  • SOC Design Top Level Assembly Methodologies…

    NVIDIA (Santa Clara, CA)
    …work experience in chip design , specializing in SOC integration and design automation + Excellent analytical and problem-solving skills. + Strong ... NVIDIA SOCD CAD team is looking for a top engineer with proven experience in hardware design ...day-to-day interaction with front-end RTL unit designers, back-end physical design engineers, DFT engineers, power architects, software… more
    NVIDIA (10/15/24)
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  • Senior Silicon Engineer PD CAD Signoff

    Microsoft Corporation (Mountain View, CA)
    …a team that is responsible for developing and delivering the latest Electronic Design Automation (EDA) technologies to various silicon teams within Microsoft. In ... (FEV) methodology for hierarchical and block-level partitions between RTL, Design for Testability ( DFT )-inserted RTL and Gate-level/Power-Ground (PG)… more
    Microsoft Corporation (11/20/24)
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  • Sr. Principal ASIC Physical Design

    Northrop Grumman (Linthicum, MD)
    …making history. Northrop Grumman Mission Systems (NGMS) is seeking an ASIC Physical Design Engineer to join our team of highly qualified, diverse individuals ... join our team as an Sr. Principal ASIC Physical Design Engineer based out of Linthicum, MD...Collaborate with the front-end team to address and resolve design issues and challenges. + Develop automation more
    Northrop Grumman (11/28/24)
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  • Digital Integrated Circuit Design

    The Boeing Company (Huntington Beach, CA)
    …in support of these projects. We are seeking a **Digital Integrated Circuit Design Engineer (Mid-Level, Senior or Lead)** with experience developing complex, ... 3rd party IP (digital, mixed-signal), synthesis, place & route, design -for-test ( DFT ) insertion + Static timing analysis...than one domain. + Experience with industry standard Electronic Design Automation (EDA) tools and methodologies for… more
    The Boeing Company (11/16/24)
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  • Senior ASIC Physical Design Engineer

    NVIDIA (Santa Clara, CA)
    …amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you want ... What you'll be doing: + Drive next generation physical design work to achieve best in class PPA for...clock distribution and planning as well as impact of DFT logic in timing convergence. + Knowledge of circuits… more
    NVIDIA (09/27/24)
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  • Senior Memory Circuit Design

    Broadcom (Mendota Heights, MN)
    …Account, please Sign-In before you apply.** **Job Description:** **Senior Memory Circuit Design Engineer ** We are looking for energetic and passionate memory ... design engineers to join our Central Engineering Group and...of memory behavioral and physical models + Understanding of DFT schemes and chip level integration + Familiarity with… more
    Broadcom (11/20/24)
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  • Staff Memory Circuit Design Engineer

    Broadcom (Mendota Heights, MN)
    …Account, please Sign-In before you apply.** **Job Description:** **Staff Memory Circuit Design Engineer ** **We are looking for energetic and passionate memory ... design engineers to join our Central Engineering Group and...of memory behavioral and physical models** + **Understanding of DFT schemes and chip level integration** + **Familiarity with… more
    Broadcom (11/14/24)
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  • ASIC Design Engineer , Cloud-Scale…

    Amazon (Cupertino, CA)
    …of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, ... and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring… more
    Amazon (11/16/24)
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  • Senior Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    …of low power circuits, eg power gating, decaps, multi-vt is required. + Understanding of Design -for-test ( DFT ) and logic design is a plus. + Proficiency in ... you'll be doing: + Participate in cutting edge Processor design in deep submicron technologies. + Work as part...scripting language, such as, Perl, Tcl, Make and automation methods/algorithms a certain plus. + Prior leadership experience… more
    NVIDIA (10/12/24)
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  • Principal Product, ATE Test Development…

    onsemi (Richardson, TX)
    … supporting Analog/Digital test strategies across various product lines. Test Development and Automation engineer will define, lead, and drive ATE automated test ... markets. In this role, you'll be a member of DfT and Test Technology Development team, tasked with driving...Analog / Mix Signal blocks. End goal is to design and productize deep Analog and Mix Signal test… more
    onsemi (10/25/24)
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