• EDA Infrastructure Engineer

    NVIDIA (Durham, NC)
    …make the most innovative chips in the world. You will work with your team of EDA and software experts to build new infrastructure in an agile environment. You ... equivalent experience, you'll collaborate with various teams to improve our infrastructure environment within NVIDIA's Hardware Infrastructure team. You will… more
    NVIDIA (10/22/24)
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  • Manager, Systems Development Engineering…

    Google (Sunnyvale, CA)
    …that provides the support and mentorship needed to learn and grow. Together we engineer and build the infrastructure , tools, access and telemetry for systems ... years of experience with organizational design. Preferred qualifications: + Experience in EDA Tools/Chip Design. + Experience interacting with the end users and… more
    Google (11/16/24)
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  • Sr. Director, EDA Engineering

    Skyworks (Irvine, CA)
    Sr. Director, EDA Engineering Apply now " Date:Oct 31, 2024 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and exciting career in ... communicates. Requisition ID: 72376 Job Summary Skyworks seeks a Senior Director of EDA Engineering to lead advanced EDA engineering efforts globally. We are… more
    Skyworks (11/14/24)
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  • Design Verification Infrastructure

    Capgemini (San Francisco, CA)
    **Job Title: Design Verification Infrastructure Engineer ** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job Description:** **Key Responsibilities:** + ... **Required Skills:** + .Minimum 5 years of strong experience in EDA /CAD SoC/IP design verification and infrastructure development + .Proficiency in… more
    Capgemini (10/05/24)
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  • System Development Engineer , Annapurna…

    Amazon (Austin, TX)
    infrastructure issues involving networking, high performance compute clusters, infrastructure automation of hardware/software/firmware testing, and ASIC/ EDA ... of talent, we've been able to improve AWS cloud infrastructure in networking and security with products such as...role involves developing a broad range of skills. The engineer leverages their Linux skills to troubleshoot, innovate fixes… more
    Amazon (10/02/24)
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  • Staff CAD Engineer

    Renesas (Chandler, AZ)
    Staff CAD Engineer Job Description Within OED, the PDK team works with internal and external foundries to develop and deploy high quality PDKs on both mature and ... dynamic and fast-paced team interfaces directly with foundries and EDA tool vendors, as well as internally through foundry...team is looking for a CAD Physical Verification (PV) Engineer based out of US to enhance the team's… more
    Renesas (09/18/24)
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  • Design Automation Engineer

    Broadcom (Allentown, PA)
    …a Candidate Account, please Sign-In before you apply.** **Job Description:** **Design Automation Engineer ** This position is part of a team tasked with the support ... & design data management systems like git, DesignSync + Familiarity with common EDA data formats like LEF/DEF, OASIS, openAccess, SPICE/SPECTRE + Familiarity with … more
    Broadcom (11/01/24)
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  • Electronic Design Automation Engineer

    Broadcom (Chandler, AZ)
    …3rd party EDA /CAD tools. Candidates will also work on the infrastructure needed for these systems to achieve peak efficiency utilizing distributed Linux compute ... Level:** **ICB3** **Job Posting Title :** **Electronic Design Automation Engineer ** **Job Description:** **Broadcom's internal Central Engineering Library development… more
    Broadcom (11/01/24)
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  • Applications Engineer Consultant - Physical…

    Siemens Digital Industries Software (San Diego, CA)
    **Job Family:** Sales **Req ID:** 431037 Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies ... to assess their technical requirements and the options/ability for Siemens's EDA 's physical verification flows/solutions in order to develop and implement technical… more
    Siemens Digital Industries Software (10/25/24)
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  • ASIC Engineer , Power

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Power Engineers within our Infrastructure organization to work on power/performance optimizations from SOC Architecture to System ... large complex disaggregated ASICs, with exposure to power modeling, developing flows around EDA tools, and low-power design to build efficient System on Chip (SoC)… more
    Meta (10/12/24)
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  • ASIC Engineer , Physical Design

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend ... (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical design implementation… more
    Meta (10/22/24)
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  • SRAM Timing Engineer

    NVIDIA (Santa Clara, CA)
    …a lasting impact on the world! We are currently looking for a SRAM Timing Engineer to join our team of dedicated engineers developing custom SRAM circuits that help ... closely with design and CAD teams to develop the infrastructure for timing closure, identify improvements and solutions and...multiple circuit design and technology teams and 3rd party EDA tool vendors across geographies. What we need to… more
    NVIDIA (10/22/24)
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  • ASIC Engineer , DFT

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test (DFT) methodologies, implementation, and ... and implementation for IP/SOC, with a deep understanding of Siemens/Synopsys DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC … more
    Meta (10/18/24)
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  • ASIC Engineer Intern, Implementation

    Meta (Sunnyvale, CA)
    …have an opportunity to participate in design implementation/emulation, physical design, EDA infrastructure methods, and design power estimation/management using ... **Summary:** Meta is seeking an ASIC Engineer Intern to join our Infrastructure ...enhance PPA (Power, Performance, Area) 4. Support and develop EDA Infrastructure , and help improve designer productivity… more
    Meta (11/04/24)
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  • Senior Cloud Solutions Engineer (Atlanta)

    Cadence Design Systems, Inc. (San Jose, CA)
    …use your skills and knowledge of Linux, HPC on public cloud infrastructure , infrastructure -as-code, and shell and configuration management scripting to assist ... while delivering world-class customer support. Role: Senior Cloud Solutions Engineer Location: Atlanta, GA Must Haves: + 3+ years...HPC workloads in a public cloud environment, preferably in EDA , or semiconductor industry, or for a systems design… more
    Cadence Design Systems, Inc. (10/05/24)
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  • Senior E/E & Semiconductor Engineer - ASIC…

    Capgemini (San Francisco, CA)
    **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip development, ... edit techniques *Proficient in Synopsys Fusion Compiler, ICC/ICC2, PTSi, and Cadence EDA Tool Suite *Experience in Design Automation and UNIX system. *Experience in… more
    Capgemini (10/16/24)
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  • Sr. Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …the world. Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses ... training datacenter servers). Our success depends on our world-class server infrastructure ; we're handling massive scale and rapid integration of emergent… more
    Amazon (10/18/24)
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  • Technologist - Analog/Mixed-Signal CAD Development…

    Western Digital (San Jose, CA)
    …media or shop online lately? You'll find Western Digital supporting the storage infrastructure behind many of these platforms. And, that flash memory card that ... the further development of concepts and methods for the EDA design environments with focus on analog / mixed...+ Managing the quality and ISO26262 requirements for the EDA tools, both for in-house developments and vendor products… more
    Western Digital (11/16/24)
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  • Senior ASIC Physical Design Engineer

    Capgemini (San Francisco, CA)
    **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, partitioning, ... edit techniques + Proficient in Synopsys Fusion Compiler, ICC/ICC2, PTSi, and Cadence EDA Tool Suite + Experience in Design Automation and UNIX system. + Experience… more
    Capgemini (10/16/24)
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  • Senior Silicon Engineer PD CAD Signoff

    Microsoft Corporation (Mountain View, CA)
    The Azure Hardware Systems and Infrastructure team at Microsoft is spearheading the technology revolution, leading the creation and implementation of innovative ... cloud infrastructure solutions. Within our Silicon Engineering division, you will...and Computing. We are looking for a **Senior Silicon Engineer ** to join our team! If you are like… more
    Microsoft Corporation (11/12/24)
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