• EM / IR Principal

    Cadence Design Systems, Inc. (San Jose, CA)
    …electrical and electronic circuits, and debug common problems. 2. Excellent knowledge on how power, IR , and EM analyses impact chip planning to IR / EM ... with Parasitic Extraction. 5. Good debugging skills in P&R, STA, and chip power/ IR / EM sign-off. 6. Excellent background in at least one scripting language such… more
    Cadence Design Systems, Inc. (09/18/24)
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  • Principal IO Design Engineer, HBM Design

    Micron Technology, Inc. (Folsom, CA)
    …+ Experience with industry-standard tools such as Cadence ADE, Spectre, AMS verification, EM / IR flows, MATLAB, Calibre, etc. + Experience with power network ... crafting circuits for the next generation of memory that will power leading-edge AI applications ? You will work in an innovative and dynamic team and will be… more
    Micron Technology, Inc. (07/25/24)
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  • Senior/ Principal Layout Designer - DRAM…

    Micron Technology, Inc. (Atlanta, GA)
    …analog layouts used in DRAM chips. + Perform layout verification like LVS/DRC/ EM , quality check, and documentation. + Responsible for on-time delivery of block-level ... understanding of layout fundamentals ie Electro-migration,and Latch-up, coupling, crosstalk, IR -drop, parasitic analysis, matching, shielding, etc. + Should have… more
    Micron Technology, Inc. (09/03/24)
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