- SpaceX (Redmond, WA)
- ASIC/ FPGA Verification Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out exploring the ... the ultimate goal of enabling human life on Mars. ASIC/ FPGA VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX...in electrical engineering or computer engineering + Experience with verification methodologies such as UVM + Strong… more
- BAE Systems (San Diego, CA)
- …self-checking testbenches in SystemVerilog/ UVM , OVM, and/or VHDL + Experience with FPGA /ASIC design and verification tools (Mentor Questa or Cadence) + ... **Job Description** Picture yourself developing advanced electronic systems deployed to protect members of...your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan,… more
- Teledyne (Chestnut Ridge, NY)
- …**Qualifications:** + MS in Computer Engineering/Electrical Engineering or equivalent. + Experience in FPGA verification of complex FPGA design. + Direct ... and Cocotb to implement AXI4 and AXIS based testbenches. + Knowledge and experience of UVM is a plus. + Experience with FPGA simulation tools such as Questa… more
- RTX Corporation (Tucson, AZ)
- …(2) of the following: + FPGA design (VHDL and/or Verilog coding) or FPGA verification (SystemVerilog coding) + Xilinx or Microsemi devices and flow tools + ... processors + Gigabit serial interfaces and multi-gigabit transceivers (MGTs) + Constrained random verification in UVM using System Verilog + Verification … more
- L3Harris (San Diego, CA)
- …HDL code for module and top level and generate appropriate testbench and verification environments. + Map FPGA simulation work products to system-level ... Job Title: Lead, FPGA Design Engineer - Technical Lead (Secret Clearance)...directly involved in the design, integration, and test of advanced satellite communication links, digital telemetry, signal processing, and… more
- BAE Systems (Nashua, NH)
- …(C/C ) + Scripting skills (Perl, Python, bash, Tcl) + Exposure to Design Verification methodologies such as UVM /OVM + Experience with Earned Value Management is ... **Job Description** BAE Systems is seeking FPGA Design Managers! Because this role involves a...engineers. Our employees work on the world s most advanced electronics from detecting threats for F-35 pilots to… more
- BAE Systems (Nashua, NH)
- …Skills** + 6 years of relevant experience with bachelor's degree (less years with advanced degree) + Experience in FPGA (preferred) or ASIC Design / Development ... order to design, develop and produce world s most advanced electronics Spanning air, land, sea, and space, we...hardware design and hands-on lab debug Experience working with FPGA design verification teams Some experience with… more
- RTX Corporation (Tucson, AZ)
- …vendors, and executive leadership + Translate system-level requirements into FPGA requirements + Create documentation including requirements, verification ... Minimum of ten (10) years of applicable experience in FPGA design, verification , and integration to include...Gigabit serial interfaces and multi-gigabit transceivers (MGTs) + Assertion-based verification and UVM using System Verilog +… more
- BAE Systems (Austin, TX)
- …generating scripts (Perl, Tcl, Python, shell, etc.) + Working knowledge of UVM /SystemVerilog and familiarity with design verification + Working knowledge of ... BAE Systems has an open position for a Senior FPGA Digital Design Engineer! See what you re missing....missing. Our employees work on the world s most advanced electronics from detecting threats for F-35 pilots to… more
- BAE Systems (San Diego, CA)
- …design team + Experience with high speed ADC/DAC interfaces + Experience with UVM /SystemVerilog and working with design verification teams + Working knowledge of ... **Job Description** BAE Systems is seeking a Senior Principal FPGA Design Engineer! See what you re missing. Our...missing. Our employees work on the world s most advanced electronics from detecting threats for F-35 pilots to… more
- BAE Systems (Westminster, CO)
- …digital electronics, FPGAs, and embedded processor systems. + Experience with OVM/ UVM Verification methodologies. + Experience developing specifications, cost, ... **Job Description** **Engineer II FPGA Design** **US CITIZENSHIP REQUIRED** \#LI-LB1 The Engineering,...and electronic systems background. + Digital system partitioning and advanced function implementation in FPGAs. + Expertise in VHDL/Verilog… more
- L3Harris (Rochester, NY)
- …in Object Oriented Programming(C++, JAVA) + Proven proficiency in FPGA /ASIC verification using SystemVerilog + Exposure to UVM /OVM methodology + Experience ... of secure tactical communication products. The candidate will function primarily in an FPGA verification role, working in a cooperative team environment to… more
- L3Harris (Rochester, NY)
- …in Object Oriented Programming(C++, JAVA) + Proven proficiency in FPGA /ASIC verification using SystemVerilog + Working knowledge of UVM /OVM methodology + ... communication products. The candidate will function primarily in an FPGA verification role, working in a cooperative...Experience with Advanced Functional Verification tools to report functional coverage + Experience with… more
- Northrop Grumman (Linthicum, MD)
- …of our cross-discipline engineering team in Mission Systems that encompasses Digital Verification Engineering to support ASIC and FPGA product development. + ... complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. +...reviews, test development and RTL debug **Preferred Qualifications:** + Advanced Degree with at least 3+ years of professional… more
- Capgemini (Santa Clara, CA)
- …*Architect and Create verification environments using System-Verilog and Universal verification methodology- UVM IPs and SoCs with embedded CPUs and analog ... & System Verilog. * Strong knowledge in SV Assertions, UVM /OVM and functional code coverage. * SOC Verification...using ARM Cortex Microcontroller is required. * Experience with advanced peripheral bus Verification IP's such as… more
- Northrop Grumman (Linthicum, MD)
- …and HVL (SystemVerilog). Experience with SystemVerilog Assertions (SVA) and Universal Verification Methodology ( UVM ) is required. Successful candidates will have ... + Experience with SystemVerilog Assertions (SVA) + Knowledge of Universal Verification Methodology ( UVM ) + Experience with scripting languages (Bash,… more
- Northrop Grumman (Linthicum, MD)
- …can be used in Lieu of a BS degree + Advanced Knowledge of UVM and use of a coverage-driven verification methodology + Experience developing test plans, ... NGMS, Digital Technologies Group, is seeking a Staff Digital Verification Engineer to support ASIC and FPGA ...complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilog. This… more
- Northrop Grumman (Linthicum, MD)
- …and HVL (SystemVerilog). Experience with SystemVerilog Assertions (SVA) and Universal Verification Methodology ( UVM ) is required. Successful candidates will have ... (SystemVerilog) + Experience with SystemVerilog Assertions (SVA) + Knowledge of Universal Verification Methodology ( UVM ) + Familiarity with a coverage driven … more
- BAE Systems (Manchester, NH)
- …split between working onsite and remotely. BAE Systems is seeking a Design Verification Manager to work within our Electronic Systems business area leading a Design ... Verification (DV) group. We are interested in candidates with...engineering teams through all phases of an ASIC or FPGA development lifecycle is important, as the individual will… more
- Huntington Ingalls Industries (Roanoke, VA)
- …Matlab, etc. * UVM concepts * Directed, constrained-random, and assertion-based verification (ABV) techniques at the gate , interface, and transaction levels, ... can uncover difficult-to-activate corner-case bugs and vulnerabilities in the gate -level netlists of FPGA and ASIC designs....Software or hardware reverse-engineering (eg, IDA Pro, Ghidra) * FPGA design or verification * Active Secret… more