• IC Layout Engineer

    SpaceX (Sunnyvale, CA)
    IC Layout Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... make this possible, with the ultimate goal of enabling human life on Mars. IC LAYOUT ENGINEER ( SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (09/25/24)
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  • ASIC/ IC Layout Engineer

    Actalent (Morrisville, NC)
    ASIC/ IC Layout Design Engineer - REMOTE Summary: Microsoft Silicon Team is continuing to revolutionize consumer electronic devices & Cloud Computing. This ... tools. Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and... who is innovative and has a passion for IC Layout design of high-speed CMOS Interface… more
    Actalent (11/15/24)
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  • SR. IC Package Design Engineer

    SpaceX (Irvine, CA)
    SR. IC Package Design Engineer ( Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. IC PACKAGE DESIGN ENGINEER ( SILICON ...BGA configuration and package structure + Responsible for package/SIP layout , optimization, design verification and tapeout + Interface and… more
    SpaceX (11/16/24)
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  • RF/Analog IC Design Engineer

    SpaceX (Redmond, WA)
    RF/Analog IC Design Engineer ( Silicon ...partition functions between hardware and software domains + Perform IC floor planning and layout + Model ... with the ultimate goal of enabling human life on Mars. RF/ANALOG IC DESIGN ENGINEER ( SILICON ENGINEERING) At SpaceX we're leveraging our experience in… more
    SpaceX (10/01/24)
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  • Integrated Circuit ( IC ) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, silicon , ... member of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon -based, compound-semiconductor, and… more
    MIT Lincoln Laboratory (09/12/24)
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  • Remote ASIC/ IC Design Engineer

    Actalent (Morrisville, NC)
    Layout Design Engineer who is innovative and has a passion for IC Layout design of high-speed CMOS Interface D2D and SERDES for next generation Consumer ... design team. Responsibilities: The primary responsibility of this position entails executing IC layout of cutting edge high-performance high-speed low power CMOS… more
    Actalent (11/14/24)
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  • Principal IC Design Engineer

    Cirtec Medical (Chandler, AZ)
    …semiconductor devices physics, have exceptional circuit analysis skills, guide others in best IC layout practices, and implement or guide the characterization of ... Principal IC Design Engineer Department: Engineering Location:...and identify critical parameters. + Development of a post silicon evaluation plan. + Support bench evaluation and debugging… more
    Cirtec Medical (09/05/24)
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  • Analog/Power IC Design Engineer

    Skyworks (Austin, TX)
    Analog/Power IC Design Engineer - Summer Intern...and using behavioral models of blocks and the entire IC , doing and/or supervising physical layout and ... way the world communicates. Requisition ID: 73883 Job Description Seeking an Analog/Power IC Design Engineer Summer Intern 2025 for developing complex analog… more
    Skyworks (09/25/24)
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  • Senior Staff IC Design Engineer

    Power Integrations (San Jose, CA)
    As a Senior Staff IC Design Engineer , you will be responsible for switching power supply development of integrated circuits using CMOS/Bipolar analog/digital ... switching power supply: + Simulation with Cadence tools. + Layout supervision and verification. + Preparation of test plan....+ Product characterization. + Bench evaluation both at the silicon level and application level. + Behavioral modeling of… more
    Power Integrations (09/06/24)
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  • Senior IC Design Engineer

    Power Integrations (San Jose, CA)
    …Technical responsibilities include: circuit design (mostly digital, some analog), simulation, layout supervision and verification, preparation of test plan for the ... bench to test correlation, bench evaluation both at the silicon level and at the applications level, and documentation....and requires having good verbal and written communications skills. Engineer must be interested in learning, be a creative… more
    Power Integrations (11/07/24)
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  • Analog IC Design Engineer -CSTM

    Texas Instruments (Dallas, TX)
    …Work with and provide guidance to physical designers and monitors the progress of IC layout + Collaborate with Design Verification teams during the pre-PG phase ... communications. **In this role, responsibilities may include:** + Lead an Analog IC design team with product ownership and responsibility from definition to release… more
    Texas Instruments (11/14/24)
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  • Staff Analog IC Design Engineer

    Power Integrations (San Jose, CA)
    …circuitry. Technical responsibilities include: analog and digital circuit design, simulation, layout supervision and verification, preparation of test plan for the ... bench to test correlation, bench evaluation both at the silicon level and at the applications level, and documentation....and requires having good verbal and written communications skills. Engineer must be interested in learning, be a creative… more
    Power Integrations (11/07/24)
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  • Analog IC Design Engineer (Battery…

    Texas Instruments (Knoxville, TN)
    …+ Work with and provide guidance to physical designers and monitor the progress of IC layout + Collaborate with Design Verification teams during the pre-PG phase ... this role, responsibilities may include:** + Lead an Analog IC design with product ownership and responsibility from definition...skills that enable on-time project delivery **Why TI?** + Engineer your future. We empower our employees to truly… more
    Texas Instruments (08/24/24)
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  • Analog IC Design Engineer

    Insight Global (Irvine, CA)
    …and etc - Experienced in implementing on-chip ESD protection strategies for HBM/MM/CDM on IC - Strong understanding of silicon fabrication and how it affects the ... PhD and 3 years. MSEE preferred - Demonstrated Analog IC design experience using SOI CMOS - Proficient with...techniques to mitigate analog signal noise coupling and optimum layout for performance, and die size trade off -… more
    Insight Global (10/12/24)
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  • Analog Layout Engineer

    Meta (Sunnyvale, CA)
    …IP's that enable the next generation of virtual and augmented reality systems. As an Analog IC Layout Engineer , you will work with a world-class group of ... Wearable Silicon AMS team as an Analog Layout Engineer and play a key role...practical experience 8. 3+ years of experience as an IC Layout Designer with analog/mixed signal … more
    Meta (10/03/24)
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  • Power Design Package/ Layout Design…

    Global Foundries (Richardson, TX)
    …skills.​ Summary of Role: Our team at GLOBALFOUNDRIES is seeking a Design Engineer who will be responsible for designing innovative reference circuits for power and ... customers through demonstrations to accelerate the adoption of GLOBALFOUNDRIES' silicon technology. Essential Responsibilities include: + Design state-of-the art… more
    Global Foundries (11/13/24)
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  • Validation Engineer

    Skyworks (Austin, TX)
    …etc.), planning and assembling the benches, and developing test flows ahead of first silicon to guarantee a successful IC bring up. + Collaborate with designers ... Validation Engineer Apply now " Date:Oct 19, 2024 Location:...software engineering team to interface with the evaluation boards. Post- silicon stage: + Assist the IC design… more
    Skyworks (09/25/24)
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  • SiliconOne Mechanical Packaging Engineer

    Cisco (San Jose, CA)
    …and SMT attach strategies and involved in multiple aspects of substrate planning and layout to make new silicon products successful. You will develop advanced ... Who We Are Cisco Silicon One is a business organization building and...of teammates. Who You Are You are a mechanical engineer with substrate expertise working on cutting-edge technologies and… more
    Cisco (11/13/24)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and multifaceted ... intelligence. What you'll be doing: + Lead and implement IC physical layout for mixed-signal functions like...concepts in submicron CMOS technologies. + Experience with analog layout for silicon chips in mass production.… more
    NVIDIA (10/17/24)
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  • Photonics Epitaxy Engineer

    NY CREATES (Albany, NY)
    …photonic devices, specifically silicon or III-V photonics + Familiarity with IC layout and verification tools (KLayout, Cadence, Mentor Graphics, Synopsys) + ... Job Description: This posting is to hire an experienced Silicon and III-V Epitaxial Process Engineer working on our Silicon Photonics technology platforms.… more
    NY CREATES (09/07/24)
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