• Layout Designer

    Texas Instruments (Phoenix, AZ)
    …+ Associate's degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design + Minimum 3.0 out of 4.0 cumulative ... Familiarity with semiconductor device physics, analog circuits and their layout sensitivities, and the IC production flow...circuits and their layout sensitivities, and the IC production flow + Working knowledge of layout more
    Texas Instruments (11/08/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …simulation, and verification of mixed-signal circuits + Supervise closely IC circuit/ mask designers, provide floorplan and layout guidelines + Support lab ... characterization of silicon + Tackle challenges of circuit design in deep submicron CMOS + Take designs through implementation and productization + Work with multi-functional teams What we need to see: + MS in Electrical Engineering or equivalent experience +… more
    NVIDIA (10/21/25)
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  • Signal Integrity Engineer

    Broadcom (San Jose, CA)
    …The ASIC Products Division at Broadcom has developed some of the most complex IC solutions and technologies over the last two decades. Our products power the ... and work on the most advanced technologies in the industry. **Responsibilities:** + Mask based timing signoff using time domain simulations (SPICE, etc.) of parallel… more
    Broadcom (11/26/25)
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  • Senior Staff Semiconductor RF Test Engineer

    Northrop Grumman (Linthicum Heights, MD)
    …ATL is responsible for all aspects of semiconductor technology including design, mask making, wafer fabrication, test, and assembly. The candidate must be a ... architect role in the development and execution of mixed-signal/RF IC device test solutions for products in various fab...probe card and package part fixture/DIB design & coordinating layout & assembly + Software skills in a modern… more
    Northrop Grumman (10/07/25)
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  • Analog Mixed Signal Integrated Circuit Design…

    Google (Mountain View, CA)
    IC design. + Experience in transistor-level schematic design, layout , simulation, and verification. + Experience with device physics and manufacturing ... built integrated circuits. + Oversee physical design and guide mask designers to create high quality layout ....guide mask designers to create high quality layout . Information collected and processed as part of your… more
    Google (11/13/25)
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