• Integrated Circuit ( IC ) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, ... of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon-based, compound-semiconductor, and heterogeneous/hybrid… more
    MIT Lincoln Laboratory (12/11/24)
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  • Principal/Sr. Principal Analog Mixed Signal…

    Northrop Grumman (Linthicum, MD)
    …requirements. Strong communication skills are required. **This position can be filled at the Principal IC Layout Engineer OR the Sr. Principal IC Layout ... involve floor planning, supporting design engineers, and coordination with mask team in reticle composition and mask ...Engineer.** Basic Qualifications for Principal IC Layout Engineer: + Bachelor's degree plus 5 years of… more
    Northrop Grumman (01/25/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and ... intelligence. What you'll be doing: + Lead and implement IC physical layout for mixed-signal functions like...(or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed… more
    NVIDIA (01/16/25)
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  • Senior IC CAD Engineer

    Power Integrations (San Jose, CA)
    …installation, license management, user support, and vendor interface. You will also work with IC layout designers in taping out physical layout design to ... this position, you will be responsible for supporting all IC design CAD tools, which include but not limited...limited to Cadence schematic entry, mixed mode circuit simulation, layout design, layout verification, logic synthesis, place… more
    Power Integrations (01/30/25)
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  • IC CAD Engineer

    Power Integrations (San Jose, CA)
    …installation, license management, user support, and vendor interface. You will also work with IC layout designers in taping out physical layout design to ... this position, you will be responsible for supporting all IC design CAD tools, which include but not limited...limited to Cadence schematic entry, mixed mode circuit simulation, layout design, layout verification, logic synthesis, place… more
    Power Integrations (01/09/25)
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  • Mask Assembly Automation Engineering…

    Skyworks (Irvine, CA)
    …package related considerations for wirebond, bumps or pillars + Provide physical mask accessories layout support for new developing processes Required Experience ... Mask Assembly Automation Engineering - Co-Op Apply now...in Electrical Engineering and Computer Engineering + Knowledge with MaskCad/ layout experience + Experience with Cadence layout more
    Skyworks (01/20/25)
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  • Senior Mixed Signal Design Engineer

    NVIDIA (Santa Clara, CA)
    …simulation, and verification of mixed-signal circuits + Supervise closely IC circuit/ mask designers, provide floorplan and layout guidelines + Support lab ... characterization of silicon + Tackle challenges of circuit design in deep submicron CMOS + Take designs through implementation and productization + Work with multi-functional teams What we need to see: + MS in Electrical Engineering or equivalent experience +… more
    NVIDIA (12/12/24)
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  • Sr./Principal HBM CAD Engineer - TPG

    Micron Technology, Inc. (Richardson, TX)
    …The tools and flows enable all aspects of mixed-signal, transistor-level custom IC design including logical design, custom layout , parameterized cells, automated ... and analysis (including HCI, BTI, EM/IR), tape out and mask generation. + Drive close collaboration with HBM design,...+ Experience developing software prototypes for innovative ideas in IC design, layout , and analysis + Experience… more
    Micron Technology, Inc. (11/21/24)
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  • PIC Design Engineer - Technical Lead - Acacia

    Cisco (Holmdel, NJ)
    …advanced photonics chips for optical communications products. You will design, simulate, layout and test PIC's. You will design, and numerically model passive, and ... HFSS and COMSOL. You will also perform script-based GDS layout of photonic components, circuits and full product chips....engineering, physics, electrical engineering. * 5+ years of photonic IC design experience in industry. * 5+ years of… more
    Cisco (11/29/24)
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  • Signal Integrity Engineer

    Broadcom (San Jose, CA)
    …The ASIC Products Division at Broadcom has developed some of the most complex IC solutions and technologies over the last two decades. Our products power the ... and work on the most advanced technologies in the industry. **Responsibilities:** * Mask based timing signoff using time domain simulations (SPICE, etc.) of parallel… more
    Broadcom (01/10/25)
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  • Sr Staff Engineer Circuit Design

    Northrop Grumman (Linthicum, MD)
    …ATL is responsible for all aspects of semiconductor technology including design, mask making, wafer fabrication, test, and assembly. The candidate must be a ... architect role in the development and execution of mixed-signal/RF IC device test solutions for products in various fab...probe card and package part fixture/DIB design & coordinating layout & assembly + Software skills in a modern… more
    Northrop Grumman (12/03/24)
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  • ROIC Design Engineer

    Lockheed Martin (Goleta, CA)
    …digital to analog converters, and high speed serial transmitters * Transistor level layout mask design * Serial interface designs including serial peripheral, ... of ROIC systems, circuit block design, circuit simulation, coordination of circuit layout designers * Lab testing and debugging of hardware * Presentation of… more
    Lockheed Martin (01/07/25)
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  • Superconducting Circuit Design Engineer

    Northrop Grumman (Linthicum, MD)
    …of the IC design flow including schematic capture, simulation, and layout . + An interest in superconductivity and advanced computing technology. + Proficient use ... physics principles to complete curated tasks delegated by technical leadership during mask design cycles. Candidates will work closely with design leads to develop… more
    Northrop Grumman (01/31/25)
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  • Photonics Integration Engineer

    NY CREATES (Albany, NY)
    …of photonic devices, specifically silicon or III-V photonics + Familiarity with IC layout and verification tools (KLayout, Cadence, Mentor Graphics, Synopsys) ... with other integration team members. + Coordinating with vendors such as the mask house, dicing/packaging, and any outsourced processes + Integration support for the… more
    NY CREATES (01/17/25)
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  • 3D/Heterogenous Integration Engineer

    NY CREATES (Albany, NY)
    …with non-CMOS technologies (MEMS, sensors, magnetics, photonics, etc) + Familiarity with IC layout and verification tools (KLayout, Cadence, Synopsys) Don't meet ... on challenges, risks, and progress. + Coordinating with vendors, such as the mask house, packaging, and any outsourced processes. + Integration support for the 3D/HI… more
    NY CREATES (01/10/25)
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