- BOEING (Berkeley, MO)
- …, fiber/ethernet, etc.Experience in requirements development, avionics hardware design & integration, subsystem/system/flight test, system verification, & ... more
- Peraton (Fort Meade, MD)
- Responsibilities Peraton is seeking an experienced Information Operations ( IO ) Planner to integrate Information Related Capabilities (IRC), functions and tasks ... more
- Broadcom (Mendota Heights, MN)
- …robustness and reliability of our SerDes IPs in our products through comprehensive Design for Test (DFT) verification, test & validation strategies. You will work ... more
- NVIDIA (Santa Clara, CA)
- …in EE/CE or equivalent experience + 5+ years working on bringup, validation, or design of HSIOs (eg: PCIE/CXL, DDR, USB, UCIE) + Experience with HSIOs like PCIE ... more
- TYLin (Hamden, CT)
- …inspire change. To empower changemakers Introba provides world-class building engineering design , analytic, and consulting services at all scales, specializing in ... more
- Google (Sunnyvale, CA)
- …integration (eg memories, IO 's, analog PHYs). + Experience with silicon interposer design . + Experience crafting physical design automation flows. Be part of ... more
- Green Cell Consulting (Quantico, VA)
- …Matter expertise in the full range of information activities, capabilities, and operations including information operations ( IO ), Information Warfare (IW), ... more
- SAIC (Macdill AFB, FL)
- …foreign governments, organizations, groups, and individuals. IO Lead to manage IO activities for the contractor's operations primarily in the USCENTCOM, ... more
- Qualcomm (San Diego, CA)
- …> Packaging Engineering **General Summary:** CHS (Central Hardware Systems) Architecture and Design team at Qualcomm has an opening for Package/System Design ... more
- Amazon (Austin, TX)
- …to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure - Drive IO /Core block physical implementation ... more
- Google (Sunnyvale, CA)
- …TPUs. You will drive the selection, integration, and execution of our high speed IO Design Intellectual Propertys (IP). In this highly cross-functional role, you ... more
- MetaOption, LLC (Milpitas, CA)
- Sr. Front-End ASIC Design Engineer Candidate needs SoC/ASIC experience working hands on currently, with non-off the shelf designs. - Compute (ie, CPUs), memory (HBM, ... more
- Amazon (Austin, TX)
- …to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure - Drive IO /Core block physical implementation ... more
- Google (Sunnyvale, CA)
- …our TPUs. You will drive the selection, integration, and execution of our high speed IO Design IPs. In this highly cross-functional role, you will be tasked with ... more
- Qualcomm (San Diego, CA)
- …processor, specific areas include 2D and 3D graphics, streaming processor, high speed IO interface and bus protocols. In this position, the designer will be ... more
- NVIDIA (Santa Clara, CA)
- …interpersonal skills + Validated experience in leading and mentoring designers + Your extensive design experience in PLL and high speed IO interfaces + In-depth ... more
- Meta (Sunnyvale, CA)
- …wafer packaging. This includes: design feasibility studies and analyses, package design /layouts based on silicon chip IO , electrical performance and system ... more
- onsemi (Richardson, TX)
- **Senior I/O Design Engineer** **onsemi** (Nasdaq: ON) is driving energy efficient innovations, empowering customers to reduce global energy use. The company is a ... more
- Capgemini (San Francisco, CA)
- …*Development of next generation memory interface considering Input/Output Physical Layer ( IO PHY), SI/PI and physical design . **Required Skills:** *Bachelor ... more
- NVIDIA (Santa Clara, CA)
- …needle! As a member of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits. Strong hands-on experience in ... more
