• Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from ... you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of diverse individuals responsible… more
    NVIDIA (09/04/24)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing ... will have a BSEE (or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed knowledge of EDA tools from Cadence, Mentor and… more
    NVIDIA (10/17/24)
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  • Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone ... Job duties will include floor planning, custom layout and verifying against design rules and schematics. + Fill, post-processing, DRC mitigation, and foundry… more
    NVIDIA (11/15/24)
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  • Senior Mask Layout Design

    NVIDIA (Santa Clara, CA)
    Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... or equivalent experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is required.… more
    NVIDIA (10/14/24)
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  • Integrated Circuit (IC) Layout and Mask

    MIT Lincoln Laboratory (Lexington, MA)
    …the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout, material growth and characterization, ... as a member of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon-based, compound-semiconductor, and… more
    MIT Lincoln Laboratory (09/12/24)
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  • Senior Mask Designer and CAD…

    NVIDIA (Austin, TX)
    …creativity and intelligence. We would love to hear from you! We are seeking a Senior Mask Layout Design Engineer to join our growing and dynamic team. The ... equivalent experience) + 7+ years of industry experience in Mask and Layout Design . + Deep understanding...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
    NVIDIA (09/27/24)
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  • Remote ASIC/IC Design Engineer

    Actalent (Morrisville, NC)
    …to help design and test great products! Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for ... 100% Remote ASIC Design Opportunity!! NOTE: START DATE IS JANUARY 2...Devices. The ideal candidate is a self-starter highly motivated engineer with excellent technical interpersonal skills used to working… more
    Actalent (11/14/24)
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  • Hardware Design Engineer 1

    Actalent (Morrisville, NC)
    Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for IC Layout design of high-speed CMOS ... Computing Devices. The ideal candidate is a self-starter highly motivated engineer with excellent technical interpersonal skills used to working independently or… more
    Actalent (11/15/24)
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  • ASIC/IC Layout Engineer

    Actalent (Morrisville, NC)
    …technology using custom IC design tools. Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for ... ASIC/IC Layout Design Engineer - REMOTE Summary: Microsoft Silicon...ASIC/IC Layout Design Engineer - REMOTE Summary: Microsoft Silicon Team is continuing...IC Layout design of high-speed CMOS Interface D2D and SERDES for… more
    Actalent (11/15/24)
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  • Senior Mask Preparation Engineer

    onsemi (Richardson, TX)
    …with photomask shop venders on delivery. + Interface with other engineering teams including Design , Fab, Tech Development as well as mask vendors to facilitate ... well as external foundries. + Perform DRC & LVS verification on chip design layouts when needed. + Perform floor-planning for production and development test… more
    onsemi (09/28/24)
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  • Principal Engineer , Mask Layout

    Microsoft Corporation (Hillsboro, OR)
    …manage and optimize the Cloud infrastructure. We are looking for a **Principal Engineer , Mask Layout** to join the team. **Responsibilities** + **Custom SRAM ... achieving optimal placement, routing, and electrical performance for custom designs. + ** Design Rule Checking (DRC), Layout vs. Schematic (LVS), DFM, Antenna, and… more
    Microsoft Corporation (11/14/24)
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  • Principal Engineer - ILT and Mask

    Siemens Digital Industries Software (Fremont, CA)
    …**Req ID:** 437774 Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to ... better products in the increasingly complex world of chip, board, and system design . **Job Summary:** We are seeking an experienced Senior R&D manager to focus… more
    Siemens Digital Industries Software (10/25/24)
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  • Global Tapeout and Mask Operations, Biz App…

    Global Foundries (Austin, TX)
    …is a leading full-service semiconductor foundry providing a unique combination of design , development, and fabrication services to some of the world's most inspired ... Tapeout and Mast Operations (GTMO) Biz App and data engineer , the candidate will work with our team of...teams to create software solutions. + Enabling scalable, Electronic Design Automation (EDA) functions in a Cloud environment. +… more
    Global Foundries (11/16/24)
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  • Electronic-Photonic Process Design Kit…

    MIT Lincoln Laboratory (Lexington, MA)
    …the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout, material growth and characterization, ... cell libraries, documenting code and methodology updates, and documenting layout changes. The engineer will collaborate with others involved in mask layout from… more
    MIT Lincoln Laboratory (09/14/24)
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  • Engineer , DRAM Design Rule

    Micron Technology, Inc. (Boise, ID)
    …to the database layout, and prioritize development of solutions with Process Integration, Advanced Mask Design , Scribe & Frame, Layout & Design + Summarize ... communicate and advance faster than ever. As a DRAM Design Rule Engineer , you will create and...and implement meaningful communication between Process Integration, Product Engineering, Design , and Advanced Mask teams + Improve… more
    Micron Technology, Inc. (10/11/24)
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  • Design Verification Engineer

    Texas Instruments (Dallas, TX)
    …know Texas Instruments will have a part in shaping it.** Texas Instruments is seeking Design Verification Engineer . In this role you will confirm the accuracy of ... components and equipment based on analysis of specifications and reliability. As a Design Verification Engineer you may also review vendor capability to support… more
    Texas Instruments (11/06/24)
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  • Design Engineer III

    PCB Piezotronics, Inc. (Depew, NY)
    …family, a competitive PTO package and 10 company paid holidays. As a skilled MEMS Design Engineer III with PCB Piezotronics, Inc, you will drive the design ... and piezoelectric devices. * Utilize layout software, preferably L-Edit, for wafer mask layout. * Conduct comprehensive data analysis, design experiments, and… more
    PCB Piezotronics, Inc. (10/30/24)
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  • ROIC Design Engineer

    Lockheed Martin (Goleta, CA)
    **Description:** You will be the Lead Integrated Circuit Design Engineer for the Santa Barbara Focalplane business, supporting our Readout Integrated Circuit ... You Will Be Doing** As the Lead Integrated Circuit Design Engineer \(ROIC\), you will be responsible...and high speed serial transmitters * Transistor level layout mask design * Serial interface designs including… more
    Lockheed Martin (10/02/24)
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  • Engineer Circuit Design

    Northrop Grumman (Linthicum, MD)
    design , mask making, wafer fabrication, testing, and assembly. The ** Engineer Circuit Design ** will support the development and execution of RF test ... exhibit excellent verbal and written communication skills. **Basic Qualifications for Engineer Circuit Design :** + Bachelor's degree in Electrical Engineering… more
    Northrop Grumman (09/28/24)
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  • Sr Staff Engineer Circuit Design

    Northrop Grumman (Linthicum, MD)
    …is seeking an exceptionally talented, motivated, and creative **Senior** **Staff Test Engineer Circuit Design ** for our Advanced Technology Lab (ATL) located ... engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The candidate… more
    Northrop Grumman (09/03/24)
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