• Principal Engineer, Mask Layout

    Microsoft Corporation (Hillsboro, OR)
    …manage and optimize the Cloud infrastructure. We are looking for a **Principal Engineer, Mask Layout ** to join the team. **Responsibilities** + **Custom SRAM ... Layout Implementation** : Lead the detailed layout of SRAM cells, memory arrays, and peripheral circuits, focusing on achieving optimal placement, routing, and… more
    Microsoft Corporation (11/14/24)
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  • Mask Layout Designer

    Actalent (Morrisville, NC)
    Description: Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for IC Layout design of high-speed ... The primary responsibility of this position entails executing IC layout of cutting edge high-performance high-speed low power CMOS...TX OTAs LDO Clock Distribution Bandgap and Bias - Layout Design review presentations. - Layout floor-planning… more
    Actalent (11/14/24)
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  • Senior Mask Layout Design Engineer

    NVIDIA (Santa Clara, CA)
    Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone who is ... team of Photonics, CMOS, Electronics, and Systems engineers + Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's,… more
    NVIDIA (11/15/24)
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  • Senior Mask Layout Design Engineer

    NVIDIA (Santa Clara, CA)
    Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing group ... experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is required. Experience… more
    NVIDIA (10/14/24)
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  • Integrated Circuit (IC) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, ... of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon-based, compound-semiconductor, and heterogeneous/hybrid… more
    MIT Lincoln Laboratory (09/12/24)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and ... have a BSEE (or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed knowledge of EDA tools from Cadence, Mentor and… more
    NVIDIA (10/17/24)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We ... are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse individuals responsible for handling… more
    NVIDIA (09/04/24)
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  • Senior Mask Designer and CAD Engineer

    NVIDIA (Austin, TX)
    …creativity and intelligence. We would love to hear from you! We are seeking a Senior Mask Layout Design Engineer to join our growing and dynamic team. The ideal ... BSEE degree (or equivalent experience) + 7+ years of industry experience in Mask and Layout Design. + Deep understanding of layout concepts in submicron CMOS… more
    NVIDIA (09/27/24)
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  • ASIC/IC Layout Engineer

    Actalent (Morrisville, NC)
    …CMOS technology using custom IC design tools. Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for IC ... ASIC/IC Layout Design Engineer- REMOTE Summary: Microsoft Silicon Team is continuing... Layout design of high-speed CMOS Interface D2D and SERDES for next… more
    Actalent (11/15/24)
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  • Electronic-Photonic Process Design Kit (PDK)…

    MIT Lincoln Laboratory (Lexington, MA)
    …has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, ... layout changes. The engineer will collaborate with others involved in mask layout from basic layout cell creation and floor-planning to final tapeout.… more
    MIT Lincoln Laboratory (09/14/24)
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  • Remote ASIC/IC Design Engineer

    Actalent (Morrisville, NC)
    …teams to help design and test great products! Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for IC ... Layout design of high-speed CMOS Interface D2D and SERDES...The primary responsibility of this position entails executing IC layout of cutting edge high-performance high-speed low power CMOS… more
    Actalent (11/14/24)
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  • Scientist II (Semiconductors)

    Leonardo DRS, Inc. (Dallas, TX)
    …looking for a strong candidate with experience in photolithography including fab processing and mask layout as well as hands on experience in other processing ... final device performance. + Must understand device design parameters and associated mask layout requirements. + Must be willing to learn photomask design for… more
    Leonardo DRS, Inc. (08/27/24)
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  • Design Engineer III

    PCB Piezotronics, Inc. (Depew, NY)
    …piezoelectric devices. * Utilize layout software, preferably L-Edit, for wafer mask layout . * Conduct comprehensive data analysis, design experiments, and ... + 5+ years in MEMS accelerometer or pressure sensor design + MEMS mask Layout + Finite Element Analysis Travel Requirements: As Needed Additional Benefits: *… more
    PCB Piezotronics, Inc. (10/30/24)
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  • Analog Engineer

    Renesas (Austin, TX)
    …blocks compliant to specs for power, speed and area + Oversee the work of mask layout staff + Write design specifications, IC verification and validation plans + ... to specs for power, speed and area + Oversee the work of mask layout staff + Write design specifications, IC verification and validation plans + Participate… more
    Renesas (11/06/24)
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  • Intern - Layout Designer

    Micron Technology, Inc. (Boise, ID)
    …with the Process and CAD teams to build innovative layout , verify the layout working with Advanced Mask Development and OPC teams to simulate what you ... learn, communicate and advance faster than ever. As a Layout Designer in the DEG Layout Design...Additionally, you will have an opportunity to work on mask generation and reticle design. **Responsibilities include but are… more
    Micron Technology, Inc. (09/09/24)
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  • Sr. Semiconductor Advanced Packaging Designer…

    L3Harris (Palm Bay, FL)
    …SCM + Experience with silicon photonics + Autocad, L-Edit, Klayout, or equivalent 2D mask layout tool L3Harris Technologies is proud to be an Affirmative ... Action/Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment… more
    L3Harris (10/14/24)
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  • Engineer, DRAM Design Rule

    Micron Technology, Inc. (Boise, ID)
    layout , and prioritize development of solutions with Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design + Summarize sophisticated ... array + Assist with reticle making from concept to fab including design, layout , scribe and test structure, reticle manufacturing specs and pre-tapeout checks + Work… more
    Micron Technology, Inc. (10/11/24)
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  • SMTS, Design Rule Enablement Team TPG

    Micron Technology, Inc. (Boise, ID)
    layout , and prioritize development of solutions with Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design Summarize sophisticated ... and quantify process margin on current devices Define milestones for projects within the layout schedule and work with the various teams to achieve the targets and… more
    Micron Technology, Inc. (10/12/24)
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  • 3D Heterogeneous Integration Development Engineer…

    Micross Components (Durham, NC)
    …deposition, electroplating, and die assembly processes. The position may also require performing mask design & layout , electrical testing, and other forms of ... material & process characterization. The successful candidate will have a strong background in back-end-of-the-line (BEOL) semiconductor processing (eg MEMS or other post-CMOS processing). Experience in advanced packaging and/or 3D integration processes is… more
    Micross Components (11/13/24)
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  • ROIC Design Engineer

    Lockheed Martin (Goleta, CA)
    …digital to analog converters, and high speed serial transmitters * Transistor level layout mask design * Serial interface designs including serial peripheral, ... of ROIC systems, circuit block design, circuit simulation, coordination of circuit layout designers * Lab testing and debugging of hardware * Presentation of… more
    Lockheed Martin (10/02/24)
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