- NVIDIA (Santa Clara, CA)
- Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - ... Engineering (or equivalent experience) + At least 5+ years of hands-on layout design experience + Deep understanding of analog circuit layout concepts… more
- NVIDIA (Santa Clara, CA)
- …you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... BSEE or equivalent experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is… more
- NVIDIA (Santa Clara, CA)
- …creativity and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a ... You will have a BSEE (or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed knowledge of EDA tools from Cadence,… more
- NVIDIA (Santa Clara, CA)
- …to the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear ... from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of diverse individuals… more
- NVIDIA (Austin, TX)
- …and intelligence. We would love to hear from you! We are seeking a Senior Mask Layout Design Engineer to join our growing and dynamic team. The ... equivalent experience) + 7+ years of industry experience in Mask and Layout Design . +...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- MIT Lincoln Laboratory (Lexington, MA)
- …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... radiation-hard CMOS, and other emerging integrated circuit technologies. The engineer will work in the Cadence environment, with which...in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our… more
- Skyworks (Irvine, CA)
- …package related considerations for wirebond, bumps or pillars + Provide physical mask accessories layout support for new developing processes Required Experience ... Mask Assembly Automation Engineering - Co-Op Apply now...internal processes including GaAs and Filters + Interface with design teams, technology development teams, and factories to define… more
- Northrop Grumman (Mcclellan, CA)
- …IC Layout Engineer /Sr. Principal IC Layout Engineer : + Experience with hierarchical design , top-level floor-planning, and chip-level integration. ... physical measurement structures. Additional responsibilities involve floor planning, supporting design engineers, and coordination with mask team...**This position can be filled at the Principal IC Layout Engineer OR the Sr. Principal IC… more
- MIT Lincoln Laboratory (Lexington, MA)
- …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... engineer will collaborate with others involved in mask layout from basic layout ...o Programming in Perl, TCL, or Python o RF layout design experience o Experience with Cadence… more
- Micron Technology, Inc. (Boise, ID)
- …to the database layout , and prioritize development of solutions with Process Integration, Advanced Mask Design , Scribe & Frame, Layout & Design + ... communicate and advance faster than ever. As a DRAM Design Rule Engineer , you will create and...Assist with reticle making from concept to fab including design , layout , scribe and test structure, reticle… more
- PCB Piezotronics, Inc. (Depew, NY)
- …* Utilize layout software, preferably L-Edit, for wafer mask layout . * Conduct comprehensive data analysis, design experiments, and develop meaningful ... and 10 company paid holidays. As a skilled MEMS Design Engineer III with PCB Piezotronics, Inc,...+ 5+ years in MEMS accelerometer or pressure sensor design + MEMS mask Layout … more
- Lockheed Martin (Goleta, CA)
- …digital to analog converters, and high speed serial transmitters * Transistor level layout mask design * Serial interface designs including serial ... **Description:** You will be the Lead Integrated Circuit Design Engineer for the Santa Barbara...Requirements and concept development of ROIC systems, circuit block design , circuit simulation, coordination of circuit layout … more
- Cisco (Holmdel, NJ)
- …dynamic group that develops advanced photonics chips for optical communications products. You will design , simulate, layout and test PIC's. You will design , ... Who you are: You have deep knowledge of PIC design , simulation, layout , fabrication, and testing needed...component testing. Preferred Requirements: * Experience with GDS level mask data for device fabrication * Experience with high-speed… more
- Sandia National Laboratories (Albuquerque, NM)
- …circuits + Microelectronics realization including requirements definition, device behavior, circuit design , mask layout , fabrication, testing, and ... (5211) is seeking an experienced R&D Microwave and Sensor Engineer to design , fabrication, test, qualification and delivery of custom designed microwave… more
- Northrop Grumman (Linthicum, MD)
- …is seeking an exceptionally talented, motivated, and creative **Senior** **Staff Test Engineer Circuit Design ** for our Advanced Technology Lab (ATL) located ... engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The candidate… more
- NVIDIA (Santa Clara, CA)
- …mixed-signal circuits + Lead mask designers, provide mentorship for floorplan and layout design + Provide support to the lab characterization of silicon, and ... the choice to join us today. We are now looking for a Senior-Mixed-Signal Design Engineer . As a member of our Mixed-Signal team, you will be leading architecture… more
- Lockheed Martin (Grand Prairie, TX)
- …Electrical Tech Lead, your responsibilities will include but are not limited to: \- Layout and mask design , device evaluation and characterization, test box ... 114,000 people worldwide and is principally engaged in the research, design , development, manufacture, integration and sustainment of advanced technology systems,… more
- NVIDIA (Santa Clara, CA)
- …, simulation, and verification of mixed-signal circuits + Supervise closely IC circuit/ mask designers, provide floorplan and layout guidelines + Support lab ... of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits....and bring up. What you'll be doing: + Lead design and implementation of high speed interface circuit +… more
- Micron Technology, Inc. (Richardson, TX)
- …tape out and mask generation. + Drive close collaboration with HBM design , layout , & verification methodology teams to propose and co-develop capabilities ... The tools and flows enable all aspects of mixed-signal, transistor-level custom IC design including logical design , custom layout , parameterized cells,… more
- Northrop Grumman (Linthicum, MD)
- …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The ... Center (NGMC) of Northrop Grumman Mission Systems is seeking a Semiconductor Equipment Engineer for our Advanced Technology Lab (ATL) - located outside of Baltimore,… more
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