- Capgemini (Minneapolis, MN)
- …in the US by Capgemini. Job: Developer Organization: ERD PPL US Title: Senior Analog Layout Engineer Location: MN-Minneapolis Requisition ID: 080737 ... ERC reports to find the fastest way to complete layout Utilizing advanced CAD tools and mask ...their journey towards Intelligent Industry. Capgemini Engineering has 65,000 engineer and scientist team members in over 30 countries… more
- Texas Instruments (Phoenix, AZ)
- …in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design Minimum 3.0 out of 4.0 cumulative GPA Preferred qualifications: ... Love your job. Texas Instruments is currently seeking a Layout Designer to join the team. In this role,...visas or work authorization for this position. Why TI? Engineer your future. We empower our employees to truly… more
- Micron Technology, Inc. (Boise, ID)
- …than ever. **Overview:** Micron is seeking a highly experienced Principal Engineer to lead Design Enablement efforts for DRAM technologies. **Key Responsibilities:** ... next-gen device development and quantify process margins. + Define sub-milestones within layout schedules and ensure timely execution across teams. + Address process… more
- Apple (Waltham, MA)
- …teams to architect and design innovative analog/mixed-signal circuits. You will also drive mask design to implement layout view of designs. You will coordinate ... Apple's products. We have an opportunity for a forward-thinking analog/mixed-signal engineer with background in SERDES, high-speed data converters, PLLs, memory… more
- Apple (Cupertino, CA)
- … layout , parasitic extraction, verification, DFT, DRCs, LVS, LVL, mask and wafer fabrication monitoring, silicon characterization, hands-on lab evaluation, ... Design knowledge of board level considerations, including component selection, PCB layout , packaging technologies and thermal analysis. Design knowledge of IC… more
- Apple (Sunnyvale, CA)
- …in ADC/DAC. Crafting blocks and documenting design towards formal design reviews. Drive mask design to implement layout view of designs. Top-level simulations to ... validate top-level integration. Defining production/bench-level test-plans. Taking lab measurements to validate analog designs. Driving/reviewing yield/lab test results to drive bug fixes. Design for ESD compliance. Minimum Qualifications Bachelor's of Science… more
- NVIDIA (Santa Clara, CA)
- …work with other team members in cutting edge process technologies and solve difficult mask design challenges. Your work on custom and compiled RAM layouts will be ... future chips! What you'll be doing: + Perform physical layout for custom embedded SRAM structures in state-of-the-art FinFET...and standard cell-based logic + Lead and mentor other mask designers to improve team efficiency and align design… more
- NVIDIA (Santa Clara, CA)
- …human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior ... Mask Layout Design Engineer ! Someone who is excited to join a growing and multifaceted group of diverse individuals responsible for handling significant… more
- NVIDIA (Santa Clara, CA)
- …the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from ... you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of diverse individuals responsible… more
- NVIDIA (Santa Clara, CA)
- …see: + Associates degree (or equivalent experience). + 8+ years proven experience in mask and layout design. + Deep understanding of digital and analog circuit ... NVIDIA products! What you'll be doing: + Perform physical layout for custom embedded SRAM structures in state-of-the-art sub-micron...+ Assist in taking part in floor planning, custom layout and verifying against design rules and schematics. +… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing ... BSEE or equivalent experience. + Minimum of 8+ years industry experience in Mask and Layout Design. + Working independently on creating layout with excellent… more
- Capgemini (Minneapolis, MN)
- …* Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout * Utilizing advanced CAD tools and mask design knowledge to deliver correct ... **About the job you're considering** * 10 years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3 years of recent… more
- Texas Instruments (Phoenix, AZ)
- …degree in Engineering or related field of study or program certificate in Advanced IC Mask Layout Design + Minimum 3.0 out of 4.0 cumulative GPA **Preferred ... Love your job.** Texas Instruments is currently seeking a Layout Designer to join the team. In this role,...or work authorization for this position.** **Why TI?** + Engineer your future. We empower our employees to truly… more
- Northrop Grumman (Linthicum Heights, MD)
- …Designs and develops circuits used in electronic devices. Responsible for layout and mask design, device evaluation and characterization, test ... Center (NGMC) of Northrop Grumman Mission Systems seeks to fill a Automation Engineer position in the Semiconductor Technologies group with a focus on device and… more
- Texas Instruments (Dallas, TX)
- …job! **About the job** As a Resolution Enhancement Techniques (RET) modeling engineer , you'll create and optimize OPC models for Texas Instruments' most advanced ... shapes needed for building accurate models. + Designing parameterized mask layouts needed for model building inputs. + Investigating...a diverse team to accomplish goals. **Why TI?** + Engineer your future. We empower our employees to truly… more
- Northrop Grumman (Linthicum Heights, MD)
- …Mission Systems is seeking a **Principal or Sr Principal Semiconductor Equipment Engineer ** for our Advanced Technology Lab (ATL) - located in **Linthicum, MD** ... ATL is responsible for all aspects of semiconductor technology including design, mask making, wafer fabrication, test, and assembly. **What you'll get to do:**… more
- Northrop Grumman (Linthicum Heights, MD)
- …exceptionally talented, motivated, and creative **Senior Staff Semiconductor RF Test Engineer ** for our Advanced Technology Lab (ATL) located outside of Baltimore, ... ATL is responsible for all aspects of semiconductor technology including design, mask making, wafer fabrication, test, and assembly. The candidate must be a… more
- Lockheed Martin (Fort Worth, TX)
- …Responsible for leading development of electronic hardware architecture, circuit design, layout and mask design, device evaluation and characterization, test ... **Description:** Electrical Engineer \- Systems Integration/Test \- Level 4 **We...Requirement Verification **Desired Skills:** * Cadence schematic capture, PCB layout Allegro * Aerospace Product Development Experience * Atlassian… more
- Google (Mountain View, CA)
- …for internally built integrated circuits. + Oversee physical design and guide mask designers to create high quality layout . Information collected and ... Analog Mixed Signal Integrated Circuit Design Engineer _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior SRAM Engineer ! The Full Custom Macro team at NVIDIA designs specialized RAM implementations for NVIDIAs wide array of processing ... technology processes + Optimize circuits for performance, area, and power + Supervise mask designers to craft high quality and dense pitch-matched layout +… more
