• Senior Mask Layout Design…

    NVIDIA (Santa Clara, CA)
    Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone ... team of Photonics, CMOS, Electronics, and Systems engineers + Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's,… more
    NVIDIA (11/15/24)
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  • Senior Mask Layout Design…

    NVIDIA (Santa Clara, CA)
    Are you interested in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is required. Experience… more
    NVIDIA (10/14/24)
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  • Principal Engineer , Mask

    Microsoft Corporation (Hillsboro, OR)
    …will manage and optimize the Cloud infrastructure. We are looking for a **Principal Engineer , Mask Layout ** to join the team. **Responsibilities** + **Custom ... SRAM Layout Implementation** : Lead the detailed layout of SRAM cells, memory arrays, and peripheral circuits, focusing on achieving optimal placement, routing,… more
    Microsoft Corporation (11/14/24)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing ... have a BSEE (or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed knowledge of EDA tools from Cadence, Mentor and… more
    NVIDIA (10/17/24)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …the world. This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from ... you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of diverse individuals responsible… more
    NVIDIA (09/04/24)
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  • Senior Mask Designer and CAD…

    NVIDIA (Austin, TX)
    …creativity and intelligence. We would love to hear from you! We are seeking a Senior Mask Layout Design Engineer to join our growing and dynamic team. The ... equivalent experience) + 7+ years of industry experience in Mask and Layout Design. + Deep understanding...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
    NVIDIA (09/27/24)
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  • ASIC/IC Layout Engineer

    Actalent (Morrisville, NC)
    …CMOS technology using custom IC design tools. Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion ... ASIC/IC Layout Design Engineer - REMOTE Summary: Microsoft...ASIC/IC Layout Design Engineer - REMOTE Summary: Microsoft Silicon Team is continuing...for IC Layout design of high-speed CMOS Interface D2D and SERDES… more
    Actalent (11/15/24)
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  • Integrated Circuit (IC) Layout

    MIT Lincoln Laboratory (Lexington, MA)
    …has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg, ... of a multi-disciplinary team responsible for the design and layout of lithographic masks for silicon-based, compound-semiconductor, and heterogeneous/hybrid… more
    MIT Lincoln Laboratory (09/12/24)
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  • Hardware Design Engineer 1

    Actalent (Morrisville, NC)
    Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for IC Layout design of high-speed CMOS ... Computing Devices. The ideal candidate is a self-starter highly motivated engineer with excellent technical interpersonal skills used to working independently or… more
    Actalent (11/15/24)
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  • Remote ASIC/IC Design Engineer

    Actalent (Morrisville, NC)
    …teams to help design and test great products! Overview: We are looking for an experienced Mask Layout Design Engineer who is innovative and has a passion for ... IC Layout design of high-speed CMOS Interface D2D and SERDES...Devices. The ideal candidate is a self-starter highly motivated engineer with excellent technical interpersonal skills used to working… more
    Actalent (11/14/24)
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  • Senior Mask Preparation Engineer

    onsemi (Richardson, TX)
    …production and development test patterns. + Write automation scripts for basic layout and/or data prep functions. + Support Integration team for technology ... development on new mask layer definition and enablement, metrology and lithography structure...metrology and lithography structure introduction. + Prepare reticle & mask data, collaborating with PDK team on data processing… more
    onsemi (09/28/24)
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  • Principal/Sr. Principal Analog Mixed Signal IC…

    Northrop Grumman (Linthicum, MD)
    …Strong communication skills are required. **This position can be filled at the Principal IC Layout Engineer OR the Sr. Principal IC Layout Engineer .** ... involve floor planning, supporting design engineers, and coordination with mask team in reticle composition and mask ...Basic Qualifications for Principal IC Layout Engineer : + Bachelor's degree plus 5 years of relevant… more
    Northrop Grumman (11/09/24)
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  • Photonics and High-Speed Electrical Layout

    Applied Materials (Santa Clara, CA)
    …Overview: We are seeking a skilled and detail-oriented Photonics and High-Speed Electrical Layout Engineer to join our dynamic organization. You will collaborate ... specifications, and utilize your expertise in photonics and high-speed electrical layout techniques to create accurate and high-performance designs. Your ability to… more
    Applied Materials (10/31/24)
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  • Analog Layout Engineer

    Insight Global (St. Paul, MN)
    …and cost-effective microelectronics solutions. They are looking for a talented Analog Layout Engineer to join their dynamic team. Job Responsibilities Include: ... Designing complex layout for mixed signal, and analog circuits in deep...mask design knowledge to deliver correct and robust layout that meet stringent performance, area and power requirements.… more
    Insight Global (11/13/24)
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  • Senior/Principal Layout Designer - DRAM…

    Micron Technology, Inc. (Atlanta, GA)
    …transforming how the world uses information to enrich life. We are looking for IP layout engineer in our DRAM and Emerging Memory Group (DEG) at Micron ... Technology, Inc., As an IP layout engineer , you will be working with...to understand various circuit design protocols, different fab processes, mask generation techniques, and tape-out processes and procedures. Our… more
    Micron Technology, Inc. (09/03/24)
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  • Electronic-Photonic Process Design Kit (PDK)…

    MIT Lincoln Laboratory (Lexington, MA)
    layout changes. The engineer will collaborate with others involved in mask layout from basic layout cell creation and floor-planning to final ... has implemented vertically integrated in-house resources to facilitate design, lithographic mask layout , material growth and characterization, fabrication (eg,… more
    MIT Lincoln Laboratory (09/14/24)
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  • Engineer , DRAM Design Rule

    Micron Technology, Inc. (Boise, ID)
    layout , and prioritize development of solutions with Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design + Summarize sophisticated ... advance faster than ever. As a DRAM Design Rule Engineer , you will create and maintain design rules for...with reticle making from concept to fab including design, layout , scribe and test structure, reticle manufacturing specs and… more
    Micron Technology, Inc. (10/11/24)
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  • CAD Engineer - TPG

    Micron Technology, Inc. (Atlanta, GA)
    …of mixed-signal, transistor-level custom IC design including logical design, custom layout , parameterized cells, automated place and route tools, physical design ... verification (LVS, DRC), ERC, Layout Parasitic Extraction, pre and post layout ...and analysis (including HCI, BTI, EM/IR), tape out and mask generation. + Drive close collaboration with DRAM design,… more
    Micron Technology, Inc. (09/20/24)
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  • Analog Engineer

    Renesas (Austin, TX)
    …blocks compliant to specs for power, speed and area + Oversee the work of mask layout staff + Write design specifications, IC verification and validation plans + ... Analog Engineer Job Description Renesas Electronics Americas (REA) brings...power, speed and area + Oversee the work of mask layout staff + Write design specifications,… more
    Renesas (11/06/24)
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  • Design Engineer III

    PCB Piezotronics, Inc. (Depew, NY)
    …piezoelectric devices. * Utilize layout software, preferably L-Edit, for wafer mask layout . * Conduct comprehensive data analysis, design experiments, and ... 10 company paid holidays. As a skilled MEMS Design Engineer III with PCB Piezotronics, Inc, you will drive...in MEMS accelerometer or pressure sensor design + MEMS mask Layout + Finite Element Analysis Travel… more
    PCB Piezotronics, Inc. (10/30/24)
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