- Micron Technology, Inc. (Richardson, TX)
- …learn, communicate and advance faster than ever. Micron Technology is seeking a **Senior Design Engineer ** to join its High Bandwidth Memory (HBM) team in ... to ensure high-performance, cost-effective, and reliable HBM products. **Responsibilities** + Design and develop high-speed interface PHY and sub-blocks (eg,… more
- Micron Technology, Inc. (Richardson, TX)
- …**Position Overview:** We are searching for a Principal HBM IO Architecture Design engineer own the development of the PHY IO on the interface die in ... design target, developing spec, architecting IO/clocking/datapath, being responsible for design , optimization, and verification . Use of both analog and… more
- Micron Technology, Inc. (Richardson, TX)
- …bit solutions in the industry. We are looking for an HBM IO Architecture Design engineer own the development of the PHY IO on the interface die in HBM ... design target, developing spec, architecting IO/clocking/datapath, being responsible for design , optimization, and verification . Use of both analog and… more
- Microsoft Corporation (Raleigh, NC)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** + Establish yourself ... environment. + Engage with partners to drive continuous improvement to both the design , to verification plans/collateral, and to methodology to prevent, reduce,… more
- Microsoft Corporation (Raleigh, NC)
- …will manage and optimize the Cloud infrastructure. We are looking for a **Principal Verification Engineer ** to join the team. **Responsibilities** + Lead an SoC ... with partners to drive continuous improvement to both the design , to verification plans/collateral, and to methodology...in one or more of the following: + Memory Controller/ PHY IPs, DDR protocols, and related firmware/BIOS/MRC + CPU… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP ... Join the High-Performance Culture at Cadence.As a Technical Presales Engineer , you will support the technical presales of DDR...providing solutions using our DDR IP portfolio. Our memory PHY and controller IPs are used in data centers,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …make an impact on the world of technology. We are seeking a highly skilled Design Engineer to join our Palladium Solutions Development team, to drive the ... development of full-system design verification environments. This role focuses on...Mixed Signal Designs and components (PHYs). Integration includes the PHY , Controller / Mac and the Accelerable Verification… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Join the High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different memory interface standards to ... providing solutions using our DDR IP portfolio. Our memory PHY and controller IPs are used in data centers,...and designers . Write application notes, user guides, articles, design ideas, new product proposals, and evaluation kit manuscripts… more
- Amazon (Austin, TX)
- …As a Systems Engineer , this role is primarily responsible for the design , development and integration of Ka band and S/C band communication payload and customer ... role will also play a critical role in the design , integration and verification of various HW...with development teams on system integration and debugging from PHY to network layer, including interfacing with flight computer… more
- NVIDIA (Santa Clara, CA)
- …the choice to join us today. The mixed-signal high-speed I/O group delivers innovative PHY designs that power the most powerful AI systems in the world today. Our ... portfolio includes PHY IPs and Chips for both copper and fiber...be translated into RTL and firmware designs. For backend design , you will define, build synthesis constraints and drive… more
- Teledyne (Milpitas, CA)
- …and networking. **Role Overview** We are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, experience, team ... measurement products. Join our high-speed Protocol Team as a **Staff** **Logic Design Engineer ** , where you'll architect and implement high-performance digital… more
- Capgemini (Minneapolis, MN)
- …during the full design cycle from floorplan analysis to completion of physical design verification * Great understanding of CAD flows and tools related to ... Experience with and knowledge of analog/mixed-signal IP (eg, SERDES PHY , transmitter and receiver, PLL, DDR PHY ,...circuits with circuit designers * Running complete set of design verification tools available on AMS blocks… more
- Amazon (Austin, TX)
- …a Systems Engineer , this role is primarily responsible for the design , development and integration of communication payload and customer terminal systems. The ... also play a critical role in the integration and verification of various HW and SW sub-systems as a...quick feedback on potential improvements * Work with the PHY and Network teams to seamlessly integrate the link-layer… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …the world of technology. About Us Cadence is a pivotal leader in electronic design , building upon more than 30 years of computational software expertise. We apply ... our Intelligent System Design strategy to deliver software, hardware, and IP that...team and help lead the proliferation of best-in-class Memory PHY IP products across a wide range of customers.… more
- Broadcom (San Jose, CA)
- …Description:** Broadcom's CSG division is seeking candidates for a Staff DFT engineer position. The successful candidate will be responsible for developing and ... implementing DFx ( Design for Test/debug & manufacturability) solutions for Digital, mixed...for test. **Responsibilities** + Own IP DFT architecture, implementation, verification , signoff STA constraints for DFT + Optimize DFT… more
- Broadcom (San Jose, CA)
- …and PHY /IO's + Scan flow development, ATPG pattern generation, verification and coverage analysis + Experience working with Mentor/Siemens DFT Tessent tool ... for leading most complex and cutting edge network switching ASIC DFx ( Design for Test/debug & manufacturability) from DFT architecture, to implementation, … more
- Tarana Wireless (Milpitas, CA)
- …complex systems, and a strong working knowledge of wireless technology from the PHY /MAC layer perspective. What You'll Do: + Design and develop system ... previously thought impossible. In this role, Staff Systems Test Engineer will be part of a team responsible for...10+ years of experience in wireless device and system verification . + Working experience with OFDM wireless system development… more
- Amazon (Cupertino, CA)
- …professional. Basic Qualifications - Experience in developing functional specifications, design verification plans and functional test procedures - ... Description AWS Infrastructure Services owns the design , planning, delivery, and operation of all AWS...Recent 5+ years experience with Ethernet switching fabrics, Ethernet PHY and SerDes interfaces, embedded CPU subsytems, DDR2/DDR3/DDR4 memory… more
- NVIDIA (Santa Clara, CA)
- …SoCs used in cellular wireless networks and/or terminals! + Track record in E2E design /testing of signal processing algorithms at the PHY layer or resource ... NVIDIA CPU/GPU/DPU based systems. We are seeking a self-motivated senior performance engineer to drive performance and scalability of our platform. This position… more
- Capgemini (El Segundo, CA)
- …Looking for a Wi-Fi Development Lead / Architect to drive the design , development, and evolution of our next-generation wireless connectivity platform. This role ... combines deep technical expertise in Wi-Fi technologies (802.11 standards, PHY /MAC, drivers, firmware, networking stack) with strong leadership in system… more
