- Siemens Digital Industries Software (Wilsonville, OR)
- …solutions, cable harness tools, and embedded software. As an Associate Application Engineer , you will be involved in a structured Training Program. This is ... program will give you outstanding insight into our technical marketing, product support, and sales organizations. Upon successful completion of this 12-month… more
- Renesas (Chandler, AZ)
- …+ Experience in DRC/ LVS /PEX/PDK QA and QA automation. + Experience in Calibre PERC applications or equivalent from other EDA vendors (ICV or Pegasus). + ... Staff CAD Engineer Job Description Within OED, the PDK team...Qualifications + Review, adapt, update, enhance and release foundry DRC/ LVS /Parasitic Extraction/PERC/FILL rundecks for Renesas internal customers. This includes… more
- Northrop Grumman (Linthicum, MD)
- …You'll get to Do:** Tasks will include circuit layout, physical verification ( LVS , DRC), and parasitic extraction for a variety of analog/mixed signal circuits, ... position can be filled at the Principal IC Layout Engineer OR the Sr. Principal IC Layout Engineer...capture and custom layout; physical verification using Assura or Calibre . + Ability to navigate file structures in the… more
- Northrop Grumman (Linthicum, MD)
- …Tasks will include schematic capture, circuit simulation, circuit layout, physical verification ( LVS , DRC), and parasitic extraction for a variety of analog and ... position can be filled at the Principal IC Design Engineer OR the Sr. Principal IC Design Engineer...simulation, and custom layout; physical verification using Assura or Calibre . + Demonstrated experience in problem solving and analytical… more
- Siemens Digital Industries Software (Fremont, CA)
- …chip, board, and system design. We are looking for a highly motivated software engineer with solid semiconductor knowledge to work on the Calibre engineering ... a team responsible for designing, developing, and supporting the Calibre Parasitic Extraction software (xACT, xACT3D). The Calibre...new technology/knowledge into at least one area of a product and to our people. + Works without supervision… more
- Northrop Grumman (Mcclellan, CA)
- …You'll get to Do** + Apply your skills as a circuit design engineer in development of cryogenic CMOS circuits for advanced power efficient computing applications. ... including schematic capture, circuit simulation, circuit layout, physical verification ( LVS , DRC), and parasitic extraction for a variety of...position can be filled at the Principal IC Design Engineer OR the Sr. Principal IC Design Engineer… more
- Northrop Grumman (Linthicum, MD)
- …Tasks will include schematic capture, circuit simulation, circuit layout, physical verification ( LVS , DRC), and parasitic extraction for a variety of RF, analog and ... design flow including schematic capture, simulation, layout, and physical verification (DRC/ LVS ). + Proficiency with Cadence Virtuoso for schematic capture, circuit… more
- NVIDIA (Santa Clara, CA)
- …level assembly. + Backgro in running, debugging and ability to customize DRC and LVS decks such as Dracula, Hercules, Calibre . + Deep understanding of analog ... We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing...have real impact in an innovative, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars… more
- Micron Technology, Inc. (Boise, ID)
- …development activities and interact with Process Integration, Advanced mask development/OPC, Product and Design, Mask shop and Electrical characterization to create ... also requires: 1. EDA tools (Cadence Virtuoso Layout and Schematic Editor, or Calibre ). 2. Circuit design, layout, schematic and verification skills including DRC, … more
- Micron Technology, Inc. (Atlanta, GA)
- …how the world uses information to enrich life. We are looking for IP layout engineer in our DRAM and Emerging Memory Group (DEG) at Micron Technology, Inc., As an ... IP layout engineer , you will be working with an exceptionally hard-working,...engineering and process-related criteria/standards needed for an assigned DRAM product are met. They will organize and prioritize logistics… more