- NVIDIA (Santa Clara, CA)
- …? If yes, We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic ... equivalent experience. + Minimum of 5+ years validated experience in Mask and Layout Design . + Deep understanding of analog circuit layout concepts in submicron… more
- NVIDIA (Santa Clara, CA)
- … Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing ... Job duties will include floor planning, custom layout and verifying against design rules and schematics. + Fill, post-processing, DRC mitigation, and foundry… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and ... will have a BSEE (or equivalent experience) + Minimum of 6 years of mask design / layout experience + Detailed knowledge of EDA tools from Cadence, Mentor and… more
- NVIDIA (Santa Clara, CA)
- …in joining our Dynamic team? If yes, We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing group of diverse ... or equivalent experience. MSEE is a plus. + 8+ years of relevant mask design / layout experience + Tape-out experience with FinFET technology is required.… more
- NVIDIA (Austin, TX)
- …We would love to hear from you! We are seeking a Senior Mask Layout Design Engineer to join our growing and dynamic team. The ideal candidate will ... equivalent experience) + 7+ years of industry experience in Mask and Layout Design . + Deep understanding...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. Make the choice to join us today. We are now looking for a Senior -Mixed-Signal Design Engineer . As a member of our Mixed-Signal team, you ... will be leading architecture definition and design of CMOS high-speed interface circuits and mixed-signal circuits....mask designers, provide mentorship for floorplan and layout design + Provide support to the lab characterization of… more
- NVIDIA (Santa Clara, CA)
- …needle! As a member of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits. Strong hands-on experience in ... and bring up. What you'll be doing: + Lead design and implementation of high speed interface circuit +...and verification of mixed-signal circuits + Supervise closely IC circuit/ mask designers, provide floorplan and layout guidelines + Support… more
- Northrop Grumman (Linthicum, MD)
- …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, testing, and assembly. **This is ... located outside of Baltimore, Maryland - is where we design , manufacture, and test semiconductor products for internal and...filled as a Principal Sustaining Dry Etch Semiconductor Process Engineer or Senior Principal Sustaining Dry Etch… more
- Northrop Grumman (Linthicum, MD)
- …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, testing, and assembly. **This is ... located outside of Baltimore, Maryland - is where we design , manufacture, and test semiconductor products for internal and...may be filled as a Principal PECVD Semiconductor Process Engineer or Senior Principal PECVD Semiconductor Process… more
- Northrop Grumman (Linthicum, MD)
- …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The candidate ... maybe filled at either **Principal Physical Vapor Deposition (PVD)** **Process Engineer ** or ** Senior Principal Physical Vapor Deposition (PVD)** **Process… more
- Micron Technology, Inc. (Boise, ID)
- …to the database layout, and prioritize development of solutions with Process Integration, Advanced Mask Design , Scribe & Frame, Layout & Design + Summarize ... communicate and advance faster than ever. As a DRAM Design Rule Engineer , you will create and...and implement meaningful communication between Process Integration, Product Engineering, Design , and Advanced Mask teams + Improve… more
- Northrop Grumman (Linthicum, MD)
- …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The candidate ... - located outside of Baltimore, Maryland - where we design , manufacture, and test semiconductor products for internal and...This requisition may be filled as a **Principal Process Engineer ** or ** Senior Principal Process Engineer… more
- Northrop Grumman (Linthicum, MD)
- …Northrop Grumman Mission Systems is seeking an exceptionally talented, motivated, and creative ** Senior ** **Staff Test Engineer Circuit Design ** for our ... of semiconductor technology and microelectronic manufacturing test methodologies is essential. The ** Senior ** **Staff Test Engineer Circuit Design ** will… more
- Northrop Grumman (Linthicum, MD)
- …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. Candidates must ... Systems is seeking an exceptionally talented, motivated, and creative Photolithography Sustaining Engineer for our Advanced Technology Lab (ATL) - located outside of… more
- TEKsystems (Norfolk, VA)
- Description Communications Network Engineer Sr. - IA A qualified candidate for this position would be responsible for network modification, design , integration, ... as they rely on subnet calc's (but as long as they know how subnetting/ mask work conceptually) - Explaining theory on public/private IP space and how to combat… more
- Power Integrations (San Jose, CA)
- …interface. You will also work with IC layout designers in taping out physical layout design to mask shop. Education (state minimum requirements): BS or MS in EE ... position, you will be responsible for supporting all IC design CAD tools, which include but not limited to...to Cadence schematic entry, mixed mode circuit simulation, layout design , layout verification, logic synthesis, place & route, SKILL… more
- Plato Systems (CA)
- …both on-site and remote candidates (including Canada). Responsibilities + Research, design , develop and evaluate advanced image processing and computer vision ... as well as specific approaches for classification, segmentation, and object detection ( Mask -RCNN, SSDs, EfficientDet, ) and common datasets (CoCo, Kitti, nuScenes, )… more
- Micron Technology, Inc. (Richardson, TX)
- …to get difficult problems solved and turn customers' dreams into reality faster. The Senior /Principal HBM CAD Engineer is a technical leadership role within the ... out and mask generation. + Drive close collaboration with HBM design , layout, & verification methodology teams to propose and co-develop capabilities outstanding… more
- Northrop Grumman (Linthicum, MD)
- …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The candidate ... - located outside of Baltimore, Maryland - where we design , manufacture, and test semiconductor products for internal and...Safety, Security, Space Coordinator **,** reports directly to the Senior manager of ATL. This Position will support the… more
- Panasonic North America (De Soto, KS)
- **Overview** As a Quality Engineer , you will collaborate closely with the Director of Quality and cross-functional teams to optimize manufacturing processes, enhance ... the success of the world's largest lithium-ion battery initiative. The Quality Engineer will work together with the Operations, Product and Process development… more
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