- NVIDIA (Santa Clara, CA)
- Are you looking for an SOC Design Engineer opportunity? If yes, come and join us. The complexity of the chip has greatly increased over the years. We are now ... for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build...and Tegra chips and interact directly with unit-level ASIC, Physical Design , CAD, Package Design ,… more
- Amazon (Sunnyvale, CA)
- …complete the execution of projects in time. Key job responsibilities As a Senior SoC Technical Program Manager, you will interface with cross-functional ... / ASIC leads) to create project execution plans for SOC development considering all criteria to design ...are architecture definition, RTL design , Verification, IP design , Physical design , post silicon… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC /ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 -… more
- NVIDIA (Santa Clara, CA)
- …be cross-disciplinary, working with software, ASIC design , verification, physical design , VLSI and platform teams. Our SoC architects excel at pushing ... We are looking for a Senior Hardware SoC Architect for our...This involves working with other IP architects, designers, verification, Physical Design , Software, DFT, Security, Automotive Safety… more
- JPMorgan Chase (Plano, TX)
- …across all applicable technology platforms at the bank. As an Assessments & Exercises Senior Associate within the Cyber and Tech Controls line of business, you will ... in people, processes, and technology. Collaborate with the team to design and execute risk-driven tests and simulations. Evaluate preventative controls, incident… more
- SpaceX (Irvine, CA)
- …generation and verification and timing closure + Work closely with chip architecture, design verification, physical design , DFT, and power teams to ... Sr. SOC /ASIC Timing Signoff & Front-End Implementation Engineer (Silicon...+ Experience with test modes, mode merging to optimize physical design implementation and STA Signoff. +… more
- Palo Alto Networks (Plano, TX)
- …- just to name a few! **Your Career** As a Domain Consultant for SOC Transformation you will be the expert for our Cortex portfolio, a Next-Gen AI-powered ... our expert at all levels in the customer hierarchy, from practitioner to senior leadership + Lead and support customer demonstrations that showcase our unique value… more
- Capgemini (San Francisco, CA)
- ** Physical Design Engineer** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... of complex digital top level and/or blocks, with experience across the complete ASIC/ SOC design flow including routing, static timing closure, EM/IR analysis and… more
- The Boeing Company (Huntington Beach, CA)
- …external wafer fabrication but performs design (architecture, RTL, synthesis, circuits, physical design , verification, packaging and test) in house. SSED has ... these projects. We are seeking a **Digital Integrated Circuit Design Engineer (Mid-Level, Senior or Lead)** with...Design Automation (EDA) tools and methodologies for digital ASIC/FPGA/ SoC design and verification - eg Synopsys… more
- NVIDIA (Westborough, MA)
- …work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Engineers to join our outstanding ... company. What you'll be doing: + You will lead all aspects of physical design and implementation of SOC devices targeted at the networking markets.… more
- NVIDIA (Santa Clara, CA)
- …high frequency clocks. + You should be able to engage with multiple teams and design the SOC clocks to satisfy all the architectural constraints. + Your ... floor-planning and back end teams to help craft the physical floorplan of the chip and explains the programming...the above teams. + Collaborate with Software and product design team to debug SOC clock silicon… more
- NVIDIA (Santa Clara, CA)
- …for the future of computing. What you will be doing: + Working with architects, design leads, physical design leads and package leads, you will develop ... We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA...Verilog or similar HVL + Experience with CAD and physical design methodologies (flow and tool development),… more
- Capgemini (Santa Clara, CA)
- **Job Title:** ** Design Verification Engineer** **Job Location: Santa Clara CA** **Job description:** *Architect and Create verification environments using ... and Gate simulations and resolve them by working with design engineers. * Create low power testcases using UPF...CPF to verify the desired power intent of the SoC . * Work with architects to determine the use-case… more
- Strategic Organizing Center (Washington, DC)
- …communications, healthcare, manufacturing and more. THE OPPORTUNITY: The Strategic Organizing Center ( SOC ) is seeking a Senior Strategic Research Analyst ( ... WHO WE ARE and WHAT WE DO: The SOC is a mission-focused center that develops strategies...players and track relevant policy and legislative developments. * Design and execute comprehensive research plans. * Conduct both… more
- The Boeing Company (Huntington Beach, CA)
- …(Virtuoso suite and Spectre simulator products) + Experience working on large-scale SoC design teams. + Experience developing Mixed-Signal circuits in ... executes the whole design flow in-house (architecture definition, circuit design , RTL, synthesis, physical layout, verification, packaging and testing). SSED… more
- NVIDIA (Hillsboro, OR)
- …You will work closely with architects, design engineers, verification engineers, and physical design engineers teams to accomplish your tasks. What you will ... We are looking for a Senior CPU Design Engineer! NVIDIA is...synthesis/timing clean design while working with the physical design team ensuring a routable and… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... + Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design . +… more
- Cadence Design Systems, Inc. (Austin, TX)
- …and vPlans. Provide timely specification clarifications and debug support + Physical design deliverables. Create functional timing constraints, synthesize RTL ... looking for an experienced RTL designer to contribute to architecture and design for next generation SoCs targeting Hyper-Scalar, Automotive, IoT and Mil-Aero… more
- NVIDIA (Santa Clara, CA)
- …all aspects of GPU and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts ... floor-planning and back end team to help craft the physical floorplan of the chip. The team explains the...with other architects, ASIC designers and verification engineers to design high frequency clocks. + You should be able… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …56G. . Familiarity with state-of-the-art SoC design implementation: RTL design , synthesis and static timing analysis, physical design flow, testbench ... is a pre-sales role. It is perfect for someone who has System/ASIC/ SoC design experience and great interpersonal and communication skills and is committed to… more