• Sr. SOC/ASIC Physical Design Methodology/…

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ASIC Physical Design Methodology/ CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is ... goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN METHODOLOGY/ CAD ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in… more
    SpaceX (12/11/25)
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  • Principal/ Senior Principal Digital ASIC…

    Northrop Grumman (Jessup, MD)
    …ASIC design flow from RTL to gates (RTL coding, simulation, synthesis , static timing analysis, logic equivalence, DFT insertion) + Proficiency with current ASIC ... lead - Strong design automation skills + Experience in CAD design network, tool configuration, and data management +...flow from RTL to gates (RTL coding, simulation, synthesis , static timing analysis, logic equivalence, DFT insertion) +… more
    Northrop Grumman (12/05/25)
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  • Senior ASIC Physical Design Engineer

    Cisco (Maynard, MA)
    …Engineer, you will play a key role in the full RTL-to-GDSII implementation flow for advanced semiconductor nodes. You will optimize floor planning and timing, ... route, static timing analysis (STA), formal equivalence check, Clock Tree Synthesis , timing closure, signal integrity, EMIR, physical verification DRC/LVS *… more
    Cisco (11/27/25)
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  • Senior VLSI Physical Design Integration…

    NVIDIA (Westford, MA)
    …to amplify human inventiveness and intelligence. NVIDIA is seeking an outstanding Senior VLSI Physical Design Integration Engineer who is dedicated to collaborating ... management to ensure compatibility between all workflows. + Run synthesis workflows and optimize for area, power, and timing....for area, power, and timing. + Run physical design flow from netlist to GDS, perform STA, physical verification… more
    NVIDIA (09/29/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …opportunity to be responsible for the micro-architecture and design including RTL design, synthesis and timing analysis using innovative CAD tools and using the ... NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory...+ Experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning,… more
    NVIDIA (12/13/25)
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  • Sr. Physical Design Methodology Engineer,…

    Amazon (Cupertino, CA)
    …10yrs or MS + 7yrs in EE/CS - 5+ years developing physical design methodology or CAD flows in synthesis , PNR, and sign-off areas for advanced technology nodes. - ... (RTL2GDS) for ML Accelerator chips in advanced nodes Drive Optimizations in CAD flows/methodologies for PPA and TAT improvements Work with EDA tool vendors… more
    Amazon (10/25/25)
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  • Sr Principal Circuit Board Designer - Electrical…

    RTX Corporation (Tewksbury, MA)
    …more secure world. The **Radar Digital Products** Department is seeking a ** Senior ** **P** **rincipal Electrical Engineer** with strong mixed signal PCB design ... Will Do** + Design embedded processor circuit boards using CAD tools + Work with a team of engineers...SystemVerilog, OVM, or VHDL + Experience with vendor logic synthesis tools (such as Xilinx Vivado) **What We Offer**… more
    RTX Corporation (11/15/25)
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