- Micron Technology, Inc. (Richardson, TX)
- …the design and development of HBM base die SoC solutions, including top - level design , verification, and integration of various IP blocks. + Ensure ... signal transmission. Furthermore, "high bandwidth"; is an outstanding memory design area where custom gate- level design... top talent to build a world-class HBM SoC design team. + Challenge the team… more
- NVIDIA (Santa Clara, CA)
- …) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design ... Are you looking for an SOC Design Engineer opportunity? If yes,...sophisticated GPU and Tegra chips and interact directly with unit- level ASIC, Physical Design , CAD, Package … more
- Google (Sunnyvale, CA)
- …performance, efficiency, and integration. In this role, you will join a team working on SoC - level RTL design for our data center accelerators. In this role ... clock gating, power gating, and DVFS. + Experience with SOC implementation standards, interfaces (ie AXI) and scripting languages...you will own top - level RTL, architecture, design and… more
- SpaceX (Irvine, CA)
- …into physical design flow + Work with systems and architecture, SOC integration, verification, DFT, mixed signal, IP owners, synthesis, and place/route teams to ... Debug and drive fixing of constraint correlation issues between top and block level + Develop clock...deadlines, as needed COMPENSATION & BENEFITS: Pay range: Physical Design STA/Timing Engineer/ Level I: $120,000.00 - $145,000.00/per… more
- SpaceX (Irvine, CA)
- …STA Signoff. + Experience with power intent and upf development for block and soc top . + Familiar with formal verification and implementing functional ecos. + ... Sr. SOC /ASIC Timing Signoff & Front-End Implementation Engineer (Silicon... and timing closure + Deep understanding of ASIC design flow, top -down and bottom-up design… more
- Indigo IT, LLC (Washington, DC)
- Senior SOC Analyst Washington, DC (Hybrid onsite and telework)...Work in Virginia, we are always looking to hire top talent in the field - come join us ... Capabilities of the Security Operations Center Assess the current capabilities of the SOC and identify deficiencies or areas for improvement based on industry and… more
- Meta (Austin, TX)
- …3+ years of experience as a Digital Design Engineer. 9. Experience with top level integration using automation tools. 10. Experience in RTL coding, synthesis ... Digital Design Engineer Responsibilities: 1. Responsible for top - level or block level uArchitecture...and/or SoC Integration. 11. Experience in digital design … more
- The Boeing Company (Huntington Beach, CA)
- …(Virtuoso suite and Spectre simulator products) + Experience working on large-scale SoC design teams. + Experience developing Mixed-Signal circuits in ... is actively hiring an **Analog Mixed Signal Integrated Circuit Design Engineer (Associate, Mid- Level or Senior),** who...Rewards package that will attract, engage and retain the top talent. Elements of the Total Rewards package include… more
- Meta (Redmond, WA)
- …systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top - level or block level uArchitecture definition and ... the power requirements. **Minimum Qualifications:** Minimum Qualifications: 8. Experience with top level integration using automation tools. 9. Experience in… more
- Amazon (Boise, ID)
- …buses like AMBA AXI4 - Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains - Large breadth ... in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI,...with ARM and various DSP ISA - Experience debugging system- level issues - Experience in entire design … more
- Amazon (Austin, TX)
- …the right trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing ... - BS in Electrical Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years in VLSI engineering - 5+ years with code quality tools… more
- Meta (San Diego, CA)
- …verification and UVM methodology. 9. 3+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies. 10. ... the testing infrastructure to validate new core IP or SoC implementations. You will work closely with researchers, architects...track detailed test plans for the different modules and top levels. 3. Drive Design Verification to… more
- Capgemini (San Francisco, CA)
- …latest Synopsys tools. The candidate should have a high aptitude for floor-planning the design of complex digital top level and/or blocks, with experience ... across the complete ASIC/ SOC design flow including routing, static timing closure, EM/IR analysis... floor planning, partitioning, timing budget generation, power planning, top - level PnR, CTS, block integration and ECO… more
- Qualcomm (Santa Clara, CA)
- …have good communication skills and able to work in dynamic environment with top level engineers and technologists + Create detailed architecture specification ... design of power management components for a modern SoC . Strong analytical, problem-solving, and communication skills are essential...SoC and board power grid definition + Architect SoC and system level power rail sequencing… more
- Microsoft Corporation (Elkridge, MD)
- …discussion around trends and early warning indicators, as well as help design solutions to emerging threats. MSRC seeks motivated, experienced security professionals ... as many customers as the Microsoft Security Response Center's Security Operations Center ( SOC ) and Incident Response Teams. The SOC within the Microsoft Security… more
- Cisco (San Jose, CA)
- …issues, provide solutions and ensure signoff clean results * Work with block and top level implementation teams to understand physical aspects and feedback on ... necessary updates * Work closely with block and TOP level physical implementation, IP development teams...with semiconductor foundries on installation, and maintenance of process design kits (PDKs) for SOC physical … more
- Colorado State University (Fort Collins, CO)
- …about why Fort Collins is consistently ranked in the top cities to live in (https://hr.colostate.edu/prospective-employees/our-community/) ! Desired Start Date ... that supports our units' individual missions. Capitalizing on Colorado State University's top ranking in veterinary medicine, and building on our tradition of… more
- Cisco (San Jose, CA)
- …provide solutions and ensure signoff clean results. * Work closely with block and TOP level physical implementation, IP development teams and to resolve PV ... robustness. * Guide and mentor a team of physical design engineers on project- level backend implementation and...with semiconductor foundries on installation and maintenance of process design kits (PDKs) for SOC physical … more
- NVIDIA (Santa Clara, CA)
- …HSpice, Finesim, XA) + Experience in crafting test bench environments for component and top level circuit verification + Expertise in System Verilog or similar ... We are looking for an Engineer to verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to have real… more
- Meta (Sunnyvale, CA)
- …verification and UVM methodology. 10. 5+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies. 11. ... and track detailed test plans for the different modules and top levels. 3. Drive Design Verification to closure based on defined verification metrics on test… more