• Senior E/E & Semiconductor Engineer

    Capgemini (Seattle, WA)
    **Job Role:** ** SOC Design Verification Engineer ** **Job location: Seattle WA** **Job Description:** We are looking for SOC Design ... _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - SOC Design Verification Engineer_ **Location:** _WA-Seattle_ **Requisition ID:** _078053_ more
    Capgemini (01/14/25)
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  • Sr.Staff SoC Lead design

    Qualcomm (Santa Clara, CA)
    … of large complex IP blocks and subsystems. **Job Responsibilities** + Lead Sub-System & SoC Design verification for Qualcomm WIFI projects + Own end-end low ... Engineering Group > ASICS Engineering **General Summary:** As a Design Verification Lead, you will lead a...technical point of contact to the different IP and SoC design teams + Provide technical leadership… more
    Qualcomm (10/29/24)
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  • Senior SOC Pre-Silicon Verification

    Micron Technology, Inc. (Richardson, TX)
    …information to enrich life. As an HBM SOC Pre-Silicon Verification Engineer , you will be responsible for the design & development of next-generation HBM ... is successful. You will apply your deep understanding of SOC Architecture, RTL Logic Design , IP Integration,...Logic chip can use a full ASIC flow. Lastly, verification and testing (validation) of HBM is the most… more
    Micron Technology, Inc. (01/18/25)
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  • SOC Verification and Methodology…

    Qualcomm (San Diego, CA)
    verification tests to identify and resolve design issues. In this role of Design Verification Engineer , you will be using advanced state of the art ... connected future for all. We are looking for ASIC Design Verification Engineers with strong CPU, ASIC...are setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer ,… more
    Qualcomm (01/17/25)
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  • Principal Engineer - HBM SOC

    Micron Technology, Inc. (Richardson, TX)
    …that are transforming how the world uses information to enrich life. As an HBM SOC Design and Integration Engineer , you will be responsible for the ... is successful. You will apply your deep understanding of SOC Architecture, RTL Logic Design , IP Integration,...Logic chip can use a full ASIC flow. Lastly, verification and testing (validation) of HBM is the most… more
    Micron Technology, Inc. (12/06/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    Are you looking for an SOC Design Engineer opportunity? If yes, come and join us. The complexity of the chip has greatly increased over the years. We are now ... top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build...automation, RTL integration, chip build and assembly, and padring design and verification . You should have real… more
    NVIDIA (01/22/25)
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  • SoC Design and Integration…

    Qualcomm (San Diego, CA)
    …engineering practices with minimal supervision + Executes the design and verification strategies according to ASICs, SoC , and IP cores specifications and ... join our team. An ideal candidate will oversee definition, design , verification , and documentation for ASIC development...through automations + Feedback Silicon learnings to process team, design methodology, IP and SoC design more
    Qualcomm (11/16/24)
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  • Sr. SOC /ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC /ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
    SpaceX (11/15/24)
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  • Principal Engineer - HBM SOC

    Micron Technology, Inc. (Richardson, TX)
    …technologies that are transforming how the world uses information to enrich life. As an HBM SOC Physical Design Engineer , you will be responsible for the ... is successful. You will apply your deep understanding of SOC Structural Design , high-speed interface design...and Full Chip Level Timing Closure, SRAM Compilers, Physical Design Verification (DRC/LVS), Formal Equivalence Verification more
    Micron Technology, Inc. (12/09/24)
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  • SoC UPF Design Engineer

    Google (Sunnyvale, CA)
    …(ie Tcl, Python or Perl). + Experience in UPF for low-power design , including power intent specification, verification , and implementation. + Experience ... with formal verification methods and design for testability (DFT) techniques. + Understanding of...this role, you will join a team working on SoC -level RTL design for our data center… more
    Google (12/18/24)
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  • SoC Design Engineer , Google…

    Google (Sunnyvale, CA)
    …performance, efficiency, and integration. In this role, you will join a team working on SoC -level RTL design for our data center accelerators. You will own RTL, ... teams. You will own deliverables to the cross-functional teams (eg, Physical Design , Verification , Validation, Firmware) at various project milestones. You will… more
    Google (01/17/25)
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  • Sr. SOC /ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    …and verification and timing closure + Work closely with chip architecture, design verification , physical design , DFT, and power teams to achieve ... Sr. SOC /ASIC Timing Signoff & Front-End Implementation Engineer...with power intent and upf development for block and soc top. + Familiar with formal verification more
    SpaceX (11/22/24)
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  • SOC /ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    …them into physical design flow + Work with systems and architecture, SOC integration, verification , DFT, mixed signal, IP owners, synthesis, and place/route ... SOC /ASIC Timing Signoff & Front-End Implementation Engineer...deadlines, as needed COMPENSATION & BENEFITS: Pay range: Physical Design STA/Timing Engineer /Level I: $120,000.00 - $145,000.00/per… more
    SpaceX (11/20/24)
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  • Senior SoC Functional Modeling…

    Amazon (Cupertino, CA)
    …or infrastructure components, testing, and debug - Work closely with architecture, RTL design , design verification , emulation, and software teams - Innovate ... SoCs for use by internal partner teams. We're looking for a Senior SoC Modeling Engineer to join the team and deliver new functional models, infrastructure, and… more
    Amazon (01/16/25)
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  • Summer Co-op, SoC /ASIC Development…

    Western Digital (Rochester, MN)
    …SoCs. As an engineering co-op you will be involved in many aspects of SoC /ASIC development, including design , verification , prototyping, timing closure, and ... to join a team of experienced engineers working on design , verification , prototyping, and validation of hard...functionality of SoC hardware. + Contribute to SoC -level verification , developing your skills in creating… more
    Western Digital (01/15/25)
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  • SoC Performance Architect

    Qualcomm (Austin, TX)
    … designs. Minimum Skill sets: + MS in Computer Science/Computer Engineering/Electrical Engineer with 3 years of experience in SoC performance/power modeling ... experience in productizing features that improve performance/power characteristics of a design Role and Responsibilities + Develop a SoC performance/power… more
    Qualcomm (01/25/25)
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  • ASIC Engineer , Design

    Meta (Columbus, OH)
    … to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with ... **Summary:** Meta is hiring ASIC Design Verification Engineer within...**Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC more
    Meta (11/09/24)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    … to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with ... **Summary:** Meta is hiring ASIC Design Verification Engineer within...**Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC more
    Meta (12/27/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    … to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with ... **Summary:** Meta is hiring ASIC Design Verification Engineer within...**Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/ SoC more
    Meta (11/20/24)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    … to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with ... **Summary:** Meta is hiring ASIC Design Verification Engineer within...**Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC more
    Meta (11/05/24)
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