- SpaceX (Sunnyvale, CA)
- Sr. SOC /ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- Micron Technology, Inc. (Richardson, TX)
- …technologies that are transforming how the world uses information to enrich life. As an HBM SOC Physical Design Engineer , you will be responsible for the ... is successful. You will apply your deep understanding of SOC Structural Design , high-speed interface design...improving design and flow issues related to physical design , identifying potential solutions, and working… more
- Capgemini (Seattle, WA)
- **Job Role:** ** SOC Design Verification Engineer ** **Job location: Seattle WA** **Job Description:** We are looking for SOC Design Verification ... digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - SOC Design Verification… more
- NVIDIA (Santa Clara, CA)
- Are you looking for an SOC Design Engineer opportunity? If yes, come and join us. The complexity of the chip has greatly increased over the years. We are now ... top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build...and Tegra chips and interact directly with unit-level ASIC, Physical Design , CAD, Package Design ,… more
- Google (Sunnyvale, CA)
- …teams. You will own deliverables to the cross-functional teams (ie Physical Design , Verification, Validation, Firmware) at various project milestones. ... this role, you will join a team working on SoC -level RTL design for our data center...deliverables from block owners. + Collaborate with verification and physical design engineers to ensure the functionality… more
- Google (Sunnyvale, CA)
- …teams. You will own deliverables to the cross-functional teams (eg, Physical Design , Verification, Validation, Firmware) at various project milestones. ... and integration. In this role, you will join a team working on SoC -level RTL design for our data center accelerators. You will own RTL, architecture, design… more
- SpaceX (Irvine, CA)
- …weekends to meet critical deadlines, as needed COMPENSATION & BENEFITS: Pay range: Physical Design STA/Timing Engineer /Level I: $120,000.00 - $145,000.00/per ... SOC /ASIC Timing Signoff & Front-End Implementation Engineer ...year Physical Design STA/Timing Engineer /Level II: $140,000.00 - $170,000.00/per year… more
- SpaceX (Irvine, CA)
- …generation and verification and timing closure + Work closely with chip architecture, design verification, physical design , DFT, and power teams to ... Sr. SOC /ASIC Timing Signoff & Front-End Implementation Engineer...+ Experience with test modes, mode merging to optimize physical design implementation and STA Signoff. +… more
- Western Digital (Rochester, MN)
- …As an engineering co-op you will be involved in many aspects of SoC /ASIC development, including design , verification, prototyping, timing closure, and validation ... future. Here's how you can help. **Job Description** The SoC Development team is seeking highly motivated students to...to join a team of experienced engineers working on design , verification, prototyping, and validation of hard disk drive… more
- Palo Alto Networks (Santa Clara, CA)
- …Join Palo Alto Networks' Information Security team as a Staff Security Engineer specializing in AI/LLM, machine learning for Security Operations. We're looking for ... (LLM) and machine learning to elevate our Security Operations Center ( SOC ), automating workflows to streamline incident detection, response, and vulnerability… more
- AutoZone, Inc. (Memphis, TN)
- …This may include, but not limited to: Responsible for technical design and administration of security controls, services, and architecture, eg infrastructure ... Expert problem solving, domain technical and analytical skills Expert system design and implementation skills Project management - estimating, planning, controlling,… more
- Belcan (Palo Alto, CA)
- Sr. Physical Design Engineer Job Number: 354330...you will contribute to all design phases of physical design of high performance SoC ... Category: Design Engineering Description: Job Title: Sr. Physical Design Engineer Pay rate:...to GDSII. You will collaborate with the Foundry Process Engineer , SoC Architect, Microarchitecture, Packaging, Signal Integrity… more
- Meta (Austin, TX)
- …on Chip ( SoC ) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... Knowledge of geometry/process/device technology implications on physical design . 15. Experience with large SOC designs...physical design . 15. Experience with large SOC designs (>100M gates) with frequencies over 1GHZ. 16.… more
- Capgemini (San Francisco, CA)
- ** Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical ... top level and/or blocks, with experience across the complete ASIC/ SOC design flow including routing, static timing...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design … more
- Capgemini (San Francisco, CA)
- **Job Role:** ** Physical Design (Synthesis) Engineer ** **Job Location : San Jose CA** **Job Description** + At least 7 years of experience in ASIC/ SOC ... **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Physical Design (Synthesis)...**Title:** _Senior E/E & Semiconductor Engineer - Physical Design (Synthesis) Engineer_ **Location:** _CA-San Francisco_… more
- Cisco (San Jose, CA)
- …semiconductor foundries on installation, and maintenance of process design kits (PDKs) for SOC physical design teams * 7+ years of experience working ... -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture... physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will… more
- Qualcomm (San Diego, CA)
- … engineering positions in our SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and cores using ... technologies. You will be part of a team responsible for the complete Physical Design Flow and deliveries of complex, high-speed, low power designs such as GPU,… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars ... goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...digital ASICs and/or FPGAs for Starlink projects, implementing complex SoC blocks and SoC integration tasks +… more
- NVIDIA (Santa Clara, CA)
- …high frequency clocks. + You should be able to engage with multiple teams and design the SOC clocks to satisfy all the architectural constraints. + Your ... The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...the above teams. + Collaborate with Software and product design team to debug SOC clock silicon… more
- Microsoft Corporation (Redmond, WA)
- …SOCs, cloud accelerators, cloud servers, and clients. We are looking for a Senior Design Verification Engineer to work on leading edge IP (intellectual property) ... work and beyond. We are looking for a **Senior Design Verification Engineer ** to join the team....proven track record of full verification cycle on complex SoC IPs and/or systems. + 5+ years experience with… more
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