- Qualcomm (San Diego, CA)
- …of power intent design at SoC level + Generate and validate power intent design ( UPF ) at SoC level + Review designs and guide IP designers' power ... more
- Micron Technology, Inc. (Richardson, TX)
- …that are transforming how the world uses information to enrich life. As an HBM SOC Design and Integration Engineer , you will be responsible for the ... more
- Micron Technology, Inc. (Dallas, TX)
- …technologies that are transforming how the world uses information to enrich life. As an HBM SOC Design Engineer , you will be responsible for the design ... more
- SpaceX (Irvine, CA)
- Sr. SOC /ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... more
- Belcan (Palo Alto, CA)
- Sr. Physical Design Engineer Job Number: 354330 Category: ...contribute to all design phases of physical design of high performance SoC design ... more
- Meta (Austin, TX)
- …execution. 3. Deliver physical design of an end-to-end IP or integration of ASIC/ SoC design and point out lower power and higher performance trade-offs. 4. ... more
- Qualcomm (Santa Clara, CA)
- …the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification lifecycle, from ... more
- Meta (Austin, TX)
- …SoCs that accelerate machine-learning and compute-vision workloads. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital ... more
- Capgemini (Santa Clara, CA)
- …** **Job Location: Santa Clara CA** **Job description:** We are seeking Digital Design (RTL) engineer for our full time role with Capgemini Engineering. ... more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or ... more
- Motion Recruitment Partners (Palo Alto, CA)
- Senior Hardware Engineer Palo Alto, CA **Onsite** Contract $70/hr - $75/hr Physical Design Engineer As a Physical Design Engineer , you will ... more
- Google (Mountain View, CA)
- …or AI accelerators. + Experience with ARM Instruction Set Architecture. + Experience with SOC design , architect, and integration. Be part of a team that pushes ... more
- Google (Mountain View, CA)
- …or AI accelerators. + Experience with ARM Instruction Set Architecture. + Experience with SOC design , architect, and integration. Be part of a team that pushes ... more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or ... more
- Meta (Sunnyvale, CA)
- **Summary:** We are currently seeking a machine learning performance modeling engineer to support the development of a custom machine learning software/hardware ... more
- Siemens (Fremont, CA)
- …and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex worlds of board and chip ... more
- Qualcomm (San Diego, CA)
- …high performance ASIC/ SoC design flows (micro-architecture, RTL design , verification, synthesis, timing/STA, UPF , CLP, LEC formal verification, DFT, ... more
- Google (Portland, OR)
- …or AI accelerators. + Experience with ARM Instruction Set Architecture. + Experience with SOC design , architect, and integration. Be part of a team that pushes ... more