• Sr . SOC/ ASIC Physical

    SpaceX (Sunnyvale, CA)
    Sr . SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is ... the ultimate goal of enabling human life on Mars. SR . SOC/ ASIC PHYSICAL DESIGN...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 -… more
    SpaceX (11/15/24)
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  • Senior E/E & Semiconductor Engineer…

    Capgemini (San Francisco, CA)
    ** Physical Design Engineer** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical ... _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San Francisco_ **Requisition ID:** _077101_ more
    Capgemini (01/15/25)
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  • Senior ASIC Physical

    Capgemini (Santa Clara, CA)
    **Job Title : Senior ASIC Physical Design Engineer** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... US by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_… more
    Capgemini (01/15/25)
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  • Senior ASIC Physical

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. ... inventiveness and intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in class PPA for high-performance designs, eg… more
    NVIDIA (01/08/25)
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  • Senior ASIC Physical

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer, Netlisting to join our dynamic and ... inventiveness and intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster… more
    NVIDIA (12/25/24)
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  • Senior ASIC Floorplan Design

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the ... and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and … more
    NVIDIA (11/06/24)
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  • Sr . Physical Design

    Amazon (Cupertino, CA)
    …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place… more
    Amazon (01/16/25)
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  • Senior Hardware Engineer, Physical

    Google (Mountain View, CA)
    …chip design tools. Minimum Qualifications: + At least 10 years experience in ASIC physical design flows and methodologies in advanced nodes. + Experience ... in a research environment. + Hands on experience and a solid understanding of ASIC physical design , physical design flows and methodologies including… more
    Google (01/16/25)
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  • Physical Design Engineer, Annapurna…

    Amazon (Cupertino, CA)
    …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind,...3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from -… more
    Amazon (11/01/24)
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  • Sr . ASIC Implementation Engineer,…

    Amazon (San Diego, CA)
    …Engineering. * 10+ years of experience in ASIC implementation. * Experience in leading physical design . * Strong exposure to UPF flow for low power design ... you will set up the flow for both logic and physical synthesis flow for various technology nodes. * Work with the ASIC design and DFT teams to understand the… more
    Amazon (01/23/25)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    …opportunity to build sophisticated GPU and Tegra chips and interact directly with unit-level ASIC , Physical Design , CAD, Package Design , Software, DFT ... NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design...design quality checks and reviews to present the physical design team with high-quality RTL What… more
    NVIDIA (01/22/25)
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  • COPD (Customer Owned Physical Design

    Broadcom (Irvine, CA)
    …that keep the globe connected. Our ASIC products division is looking for senior , physical design engineering veterans to guide teams designing some of ... Sign-In before you apply.** **Job Description:** Technical Lead for Physical Designs Are you a versatile, senior ...Well verse in EDA tools for physical design verification and sign-off. 6. Knowledge of ASIC more
    Broadcom (12/13/24)
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  • Sr . ASIC Design Engineer…

    SpaceX (Irvine, CA)
    Sr . ASIC Design Engineer...and learning new skills COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $160,000.00 - ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER (SILICON...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
    SpaceX (11/16/24)
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  • Sr . ASIC Design Verification…

    SpaceX (Irvine, CA)
    Sr . ASIC Design Verification Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN VERIFICATION ENGINEER...changing needs and requirements COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $160,000.00 - $220,000.00/per… more
    SpaceX (01/16/25)
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  • Sr . Technical Program Manager, ASIC

    Amazon (Redmond, WA)
    …of Silicon development from architecture definition, RTL design , Verification, IP design , Physical design , silicon bring up, test, characterization, ... connectivity. The Project Kuiper team is looking for a Sr . Technical Program Manager with experience in ASIC...ASIC /SOC leads) to create project execution plans for ASIC /SOC development considering all criteria to design more
    Amazon (01/22/25)
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  • Sr . SOC/ ASIC Timing Signoff…

    SpaceX (Irvine, CA)
    Sr . SOC/ ASIC Timing Signoff & Front-End...and timing closure + Work closely with chip architecture, design verification, physical design , DFT, ... the ultimate goal of enabling human life on Mars. SR . SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION...+ Experience with test modes, mode merging to optimize physical design implementation and STA Signoff. +… more
    SpaceX (11/22/24)
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  • Sr Principal Electrical Engineer FPGA/…

    Northrop Grumman (Dulles, VA)
    …will join the Electrical Engineering Avionics department that specializes in FPGA/ ASIC for space applications. **Basic Qualifications: Sr . Principal Digital ... not only part of history, they're making history. We have openings for a **FPGA/ ASIC Engineer** to join our team of qualified, diverse individuals in the Tactical… more
    Northrop Grumman (12/22/24)
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  • Sr . Advanced ASIC Engineer…

    Honeywell (Plymouth, MN)
    …experience WE VALUE + Degree in Electrical Engineering + General experience in ASIC concepts and design + Experience working in multi-disciplinary teams + ... + Lead efforts to map customer designs into Honeywell's ASIC technology + Timing constraints + Simulation + Conduct...Background in BIST, Design For Test (DFT), physical synthesis, static… more
    Honeywell (12/05/24)
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  • ASIC /FPGA Design and Verification…

    The Boeing Company (El Segundo, CA)
    …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... & Weapons Systems has an exciting opportunity for an ** ASIC and/or FPGA Design and Verification Engineer** **(Experienced, Lead or Senior )** to join us as… more
    The Boeing Company (01/24/25)
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  • Senior GPU Hardware Security Architect,…

    NVIDIA (Santa Clara, CA)
    …languages, such as: Perl, Python and Make etc. + A working understanding of floor-planning, ASIC physical design , VLSI and DFT. + A hands on technical ... Memory Security and System Configuration: NVIDIA is seeking a Senior Hardware Security Architect to architect, design ,...a Senior Hardware Security Architect to architect, design , validate, and guide implementation of HW security for… more
    NVIDIA (11/13/24)
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