- SpaceX (Irvine, CA)
- Sr . SOC / ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC TIMING SIGNOFF &...Work closely with chip architecture, design verification, physical design, DFT , and power teams to achieve tapeout success on… more
- SpaceX (Sunnyvale, CA)
- Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL DESIGN ENGINEER...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- Amazon (Austin, TX)
- …role you will: . Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets. . Define, ... configure and integration SoC Subsystems . Contribute to the SoC .... Understand low power design & the impact of DFT on the blocks . Perform initial synthesis &… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr . SOC Design Engineer-STA to continue to innovate on behalf of our customers. ... STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. - Full chip timing constraints development, full chip...timing signoff flow. - Work for Systems and Architecture, SoC Integration, Verification, DFT , Mixed Signal, IP… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... high-quality clocking and reset logic to various units in SOC and GPU ASIC . The complexity of...implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most… more
- NVIDIA (Santa Clara, CA)
- …the clocks design. + Together with other team members, we deliver clock information to SOC verification team, timing and DFT teams. You will use Perl to improve ... today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...The Team is responsible for crafting all aspects of SOC clocking. The team collaborates with the front end… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC 's and GPU's. This position offers the opportunity to have ... or Computer Engineering. + 5+ years of proven experience working on ASIC design and development. + Experience in micro-architecture and RTL development of… more
- NVIDIA (Santa Clara, CA)
- …+ Together with other team members, we deliver clock information to GPU, CPU and SOC verification team, timing and DFT teams. You will use Perl to improve ... today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency… more
- Amazon (Austin, TX)
- …trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/ DFT signal routing - As a key ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior Hardware SoC Architect for our Tegra Team! Do you want to be a part of Artificial Intelligence Revolution? Would you like to work ... world-class systems architects and deep learning experts to define the next generation SoC ? NVIDIA is developing processor and system architectures that are at the… more
- NVIDIA (Santa Clara, CA)
- …computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip ( SOC ) group is looking for a top ASIC Engineer with a curiosity ... Are you looking for an SOC Design Engineer opportunity? If yes, come and...GPU and Tegra chips and interact directly with unit-level ASIC , Physical Design, CAD, Package Design, Software, DFT… more
- SpaceX (Sunnyvale, CA)
- …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your actual ... Sr . DDR IP Design Engineer (Silicon Engineering) at...cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing… more
- Leidos (San Diego, CA)
- …in our San Diego office developing state-of-the-art hardware architectures such as system-on-chip ( SoC ). As a Sr . System Engineer you will work closely with ... SoC technology and RF technology + Familiarity with SoC design flow to include RTL, DFT ,...of low-level embedded system software and device drivers for ASIC or SoC + Strong understanding of… more
- The Boeing Company (Huntington Beach, CA)
- …industry standard Electronic Design Automation (EDA) tools and methodologies for digital ASIC /FPGA/ SoC design and verification - eg Synopsys VCS, Design ... We are seeking a **Digital Integrated Circuit Design Engineer (Mid-Level, Senior or Lead)** with experience developing complex, high-performance ASICs, FPGAs, and… more
- Capgemini (San Francisco, CA)
- …Location : San Jose CA** **Job Description** + At least 7 years of experience in ASIC / SOC project design and development + Hands on with Cadence tools, DFT ... flow & physical aware flow + Prior experience of synthesizing high speed designs (<2GHz). + Familiar with multi clock domain architectures. + Good understanding of constraints generation & tool attributes. + Good with LINT & Spyglass checks. + Good… more